搜索资源列表
Giga8b10b v10
- 可编程器件厂商Altera出品的8b10b编码器，用在现在通用的PCI－Express接口中，包含完全解密的源程序。-Altera programmable device manufacturers buy 8b10b encoder, now with the generic PCI-Express interface, including full decryption of the source.
aes
- verilog实现的AES-128加解密程序，FPGA验证通过-verilog implementation of AES-128 encryption and decryption process, FPGA verification through
aes
- aes的加密解密算法的源代码以及测试源代码和仿真结果图-aes encryption decryption algorithm source code and test source code and simulation results map
rc4
- RC4算法，WEP算法，加解密，密钥长度256-RC4 algorithm, WEP algorithm, encryption and decryption
inverter
- rc5的decryption，同样带state machine，同样有四个状态-RC5 of decryption, with the same state machine, the same four state
RC5_inv
- 不带state machine的decryption of rc5-State machine without the decryption of rc5
project
- Cobra-H128 密码的加密和解密.输入端口e=0,加密；输入端口e=1,解密。128位的块输入和4个64位的密钥-realization of encryption and decryption of Cobra-H128 cipher
rsa_IN_vhdl
- FULL SIMOLATION IN VHDL FOR RSA DECRYPTION
aes_decrypt
- This the Top Module for AES Decryption algorithm-This is the Top Module for AES Decryption algorithm
test_dec1
- This Module creates the test Bench for AES Decryption Algorithm
Verilog_study_book
- 现代计算机与通讯系统电子设备中广泛使用了数字信号处理专用集成电路，它们主要 用于数字信号传输中所必需的滤波、变换、加密、解密、编码、解码、纠检错、压缩、解压缩等操作。这些处理工作从本质上说都是数学运算。从原则上讲，它们完全可以用计算机或微处理器来完成。这就是为什么我们常用C、Pascal 或汇编语言来编写程序，以研究算法的合理性和有效性的道理。-Modern computer and communication systems are widely used in electronic eq
FPGA_128_AES_decryption
- 以FPGA具體實現的128-bit AES decryption，包括介紹文件以及源碼。-FPGA-based 128-bit AES decryption
decryption
- AES decryption in VHDL!! Wit LCD controls
Description-of-DES-with-VHDL
- 用VHDL描述DES算法 用硬件的方式DES加解密 体现了硬件编程人一般思想-DES algorithm using VHDL descr iption of the way with hardware DES encryption and decryption hardware programming reflects the general thinking of people
AES
- FPGA Implementation of AES Encryption and Decryption
avs_aes_latest[1].tar
- 数字加解密模块的设计-Digital encryption and decryption module design
aesall
- AES encryption and decryption
des_3
- 对于3DES加密解密算法的verilog实现，已经得到测试通过，对于学习3DES加密解密的实现过程很有用-3DES encryption and decryption algorithms for the verilog implementation has been tested for learning the implementation of 3DES encryption and decryption process is useful
limited_des
- this DES encryption and decryption code in verilog-this is DES encryption and decryption code in verilog
aes
- 此程序完成aes的硬件语言实现部分，通过vhdl语言完成加解密过程。-This process is complete aes hardware language section, vhdl language to complete the encryption and decryption process.