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encode_t tlk2201发射接收源码
- tlk2201发射接收源码，8b10b编解码器，实现千兆速率收发。可用于视频光端机接收发射处理串并变换。-tlk2201 transmitting and receiving source, 8b10b codec to achieve gigabit rate transceiver. Optical receiver can be used to transmit video processing strings and transform.
MAIN_RX_V10
- 8路视频光端机 接收侧 VHDL源码，使用了千兆以太网SERDES芯片，基于TBI接口的PCM视频传输。-8-Channel Video Optical Receiver side of VHDL source code, using the Gigabit Ethernet SERDES chip, based on the TBI interface PCM video transmission.
eth
- 一个ahb接口的千兆以太网MAC，包括apb的配置接口-Ahb a Gigabit Ethernet interface MAC, including the configuration interface apb
hello_world_small
- 采用altera mac核加88e111物理层芯片的千兆网方案，该文件是配置mac层和物理层的nios文件，基于hello world small工程。-88e111 by altera mac core and Gigabit Ethernet physical layer chip of the program, the file is configured mac layer and physical layer nios file, based on hello world small
ethernet_10G
- 10-Gigabit Ethernet MAC 内有说明文件 方便阅读程序-10-Gigabit Ethernet MAC documentation within easy reader
V4LwipUseMb
- 在AVNET的V4FX12开发板上使用MB实现网络的例子，可作为千兆网开发或者其他使用Xilinx芯片的朋友参考。-AVNET board in the development of V4FX12 example of using the MB network can be developed as Gigabit Ethernet or other friends using Xilinx chip reference.
88E1111_full
- 88E1111 千兆phy完整资料，如果做千兆应用可以看着个资料。 非常详细-88E1111 Gigabit phy complete information, if the application can be done looking at a Gigabit data. Very detailed
fiber_ctrl
- lattice Diamond平台的千兆以太网光纤接口与GMII接口的转换-lattice Diamond Platform of Gigabit Ethernet optical fiber interface and GMII interface conversion
NewEthernet_06_03_2
- 用XILINX公司FPGA的嵌入式集成开发平台开发的千兆以太网的完整实现代码-Code with the integrity of the integrated development platform developed by XILINX FPGA-embedded Gigabit Ethernet
tse_datapath_reference_design
- altera FPGA实现千兆以太网数据通信的程序源代码-altera FPGA Gigabit Ethernet data communication program source code
ethernet-verilog
- 非常详细的千兆以太网MAC verilog代码，可以供硬件设计时有关网络的开发参考-Very detailed Gigabit Ethernet MAC verilog code, can be used for hardware design of the network to develop a reference
8b10b
- 8b10b编解码，用于光通信和千兆以太网，verilog编写，已验证-8b10b codec for optical communications and Gigabit Ethernet, verilog prepared Verified
Tri-Eth
- 采用xilinx三太以太网ip核，tri-mode MAC完成千兆以太网数据传输-Too Ethernet using xilinx ip three nuclear, tri-mode MAC Gigabit Ethernet data transmission is completed
PHY_MDIO
- 光纤模块实现点对点通信，千兆网传输，基于FPGA，采用Verilog语言进行编程，实现千兆网模块的高速传输-Fiber-point communication module, Gigabit Ethernet transmission, based on FPGA, using Verilog language programming, high-speed transmission of Gigabit Ethernet Module
14_ethernet_test
- 这是利用FPGA实现对以太网传输的控制。FPGA为Spartan 6 LX16，以太网芯片为RTL8211。千兆传输速率。语言为Verilog，但没找到这一选项，故选择了最接近的VHDL-This is achieved using the FPGA Ethernet transmission control. FPGA for the Spartan 6 LX16, Ethernet chip RTL8211. Gigabit transmission rate.
ethernet_test
- 基于FPGA的千兆以太网通讯，通讯方式采用GMII总线通信(Gigabit Ethernet communication based on FPGA, communication using GMII bus communication)
ethernet_loopback
- 通过FPGA驱动千兆以太网口，完成SPARTAN6上的UDP数据包闭环测试，即通过网口发送数据包到FPGA，FPGA内部将接收到的数据返回到PC机，建议测试之前添加ARP静态绑定，FGPA内部的IP以及MAC地址在ROM里的COE文档里可以看到，发送端添加了CRC以及整体CHECKSUM的计算(Driven by FPGA Gigabit Ethernet port, UDP SPARTAN6 data packet on the closed loop test, through the ne
Transmit_subsystem-master
- 千兆以太网的相关资料，包括相关的一些测试文件(Gigabit Ethernet related information)
08_ethernet_1g
- Artix7 XC7A100T芯片控制千兆PHY的二层通信，源代码(Artix7 XC7A100T chip control Gigabit PHY two layer communication, source code)