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DDS_verilog
- 采用verilog实现了DDS发生器,源码已通过仿真编译已经板级调试,可直接模块化使用。-Verilog achieved using the DDS generator, source code has been compiled by board-level simulation debugging, modularity can be directly used.
I2Ctestwrite
- sopc读写i2c总线的程序,可以模块化调用。vhdl语言编写。-sopc i2c bus read and write the program, you can call the modularity. vhdl language.
modbus_latest.tar
- modbus的fpga实现。opencores上最新版本。使用fpga实现,可以大大提高响应速度,对其功能进行模块化。-modbus of fpga implementation. opencores the latest version. Use fpga implementation, can greatly improve the response speed, its function modularity.
