搜索资源列表
DDRSDRAMControllerverilogcode
- 这个设计是使用Virtex-4实现DDR的控制器的,设计分为三个主要模块:Front-End FIFOs,DDR SDRAM Controller和Datapath Module。其中主要是DDR SDRAM Controller,当然还有测试模块。-This design is the use of Virtex-4 implementation of the DDR controller, the design is divided into three main modules: Fron
Cabad
- MPEG-4/AVC - H.264 CABAC decoder written in VHDL and synthesis on a Virtex 5