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gongcehngsheji_477-2
- 使用该VHDL在仿真软件中实现RSC(递归系统卷积)码的编码以及解码硬件仿真-use of the VHDL simulation software in achieving RSC (recursive convolution system) code encoding and decoding hardware simulation
LinPF_RLS
- VHDL code for linear prediction filter based on RLS (recursive least square). Filter order is set to 4, bit precision set to 12 bits for input and output. Signals are complex signals.
b
- 递归下降分析器的设计 首先将文法改写成EBNF形式，根据递归下降分析法基本思想编写程序。 -The design of recursive descent parser rewrite first EBNF grammar forms, according to the basic idea recursive descent analysis programming.
AD_filter
- AD递推平均滤波算法，采用verilog完成，可直接使用。-AD recursive average filter algorithm, using verilog complete, can be used directly.
iir_pipe
- 此程序应用了流水线技术来实现IIR滤波器，它是由一个非递归部分和一个具有延迟为2和系数为9/16的递归部分构成。-The procedure applied to the pipeline techniques to achieve an IIR filter, which consists of a non-recursive portion and having a delay of 2 and a coefficient of the recursive part 9/16 constit