搜索资源列表
SimpleSpi
- master spi的源代码（verilog），包括文档，测试程序-master spi the source code (verilog), including documentation, testing procedures
同有SPI接口的器件进行通信对SPI接口器件的读写控制vhdl源程序
- vhdl实现spi可以同有SPI接口的器件进行通信对SPI接口器件的读写控制vhdl源程序，fpga cpld-vhdl spi can achieve devices with a SPI interface to communicate with devices on the SPI interface to read and write vhdl source code control
sinc3filter.rar
- 实现sinc3 FILTER的VHDL源码，还有实现SPI通讯的。,Sinc3 FILTER to achieve the VHDL source code, as well as the realization of SPI communication.
spi
- SPI总线接口的verilog源码，包含仿真模块modelsim 和 quartus 工程。本人测试通过。-SPI bus interface in verilog source code, including the simulation module modelsim and quartus project. I test.
SPI_controller
- SPI serial flash ROM的verilog源代码, 针对winbond W25x16,已经经过逻辑验证,并实际用在芯片设计中,作为一个模块,正常工作.-SPI serial flash ROM in verilog source code for winbond W25x16, logic has been verified, and actually used in chip design, as a module to work.
QUAD-SPI-verilog
- 难得的SPI NOR Flash控制器Verilog源代码，支持四路串行通道！-Rare SPI NOR Flash controller Verilog source code, supports four serial channels!
spi_1
- 主要是描述SPI接口的源代码，希望能给大家带来帮助。-SPI interface is described in the source code, I hope we can help.
43680540SPI_Core
- Verilog for SPI Core source code
Nios_II_SPI
- 本源码为Nios II的开发示例,主要演示Nios II的SPI总线设计。开发环境QuartusII。 本示例十分经典，对基于SOPC开发的FPGA初学者有很大帮助。-The source code for the Nios II development of an example, the main demonstration Nios II design of the SPI bus. Development environment QuartusII. This example is
simple_spi_latest[1].tar
- spi通信，主设备和辅助设备通过spi进行通信，文件中是spi的源代码-spicommunication master and slave is communication.spi is source code
SPI
- SPI总线通信模块，经测试验证通过的源码-SPI vhdl source code
SPItoI2S
- 该文件是I2S 转 SPI的Verilog的源代码，可以在此基础上修改成自己的应用代码-The file is transferred SPI, I2S Verilog source code, you can change the basis of their application code into
spi
- 片上系统设计思想与源代码分析 spi源代码-SoC design and source code analysis source code spi
CoreSPI_21_eval
- SPI IP核源码，包括Verilog和VHDL两种语言源码-SPI IP core source code, including the two languages Verilog and VHDL source code
SPI
- 含有fifo缓冲器的SPI接口源代码，用verilog语言实现-SPI Interface fifo buffer containing the source code, using verilog language
spi_driver_verilog
- SPI控制器RTL级源码，实现标准SPI硬件接口-SPI controller RTL-level source code to achieve the standard SPI hardware interface
3_05_SPI_Wr_Rd
- SPI读写实验，verilog源码，编译通过，有需要的拿去用-SPI source code
Sparten6-CODE-_Verilog
- 基于xilinx 厂商的FPGA硬件的开发源代码，包括UART,SPI,以太网通信-The development of FPGA hardware based on xilinx manufacturers source code, including the UART, SPI, Ethernet communication and so on
spi
- spi代码，来源于黄毅的片上系统与源代码分析-spi code Huang Yi on-chip system and source code analysis
SPI_ADC
- spi串行输出ADC——AD7989的verilog源代码。(Spi serial output ADC - AD7989 Verilog source code.)