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在六个数码管滚动显示自己的学号（六位）
- 在六个数码管滚动显示自己的学号（六位），每隔一定时间循环移位一次，学号为奇数则左移，学号为偶数则右移。间隔时间可由开关选择1秒，2秒，3秒和4秒。-In the six LED scrolling display their student number (six), rotate once every certain period of time, learning number is odd, then the left, student number is even, then the r
VGA_FPGA
- 我用FPGA verilog语言写的VGA显示程序，是我做的一个课程设计，在显示器上显示我的学号20082831.当然也可以改的，里面有三个文件，一个是头文件。-FPGA verilog language written with VGA display program, I do a course design, displayed on the monitor my student number 20082831. Of course, can be changed, there are t
DEMO_V
- 黑金FPGA开发板（学生）测试程序 VHDL语言 包括led 按键 串口 lcd的检测-Black Gold FPGA development board (student) test procedures VHDL language, including the detection of serial lcd led key
FPGA_radar
- 优秀硕士论文，基于FPGA的雷达信号模拟器设计，对学FPGA的，特别是学雷达的同学有很好的参考价值-Outstanding master s thesis, based on radar signal simulator FPGA design, FPGA-on study, in particular the study of radar has a good reference Student Value
03VHDL_Plaquette
- Course on Vhdl langage allow mainly student who want to learn and understand each elements of each code source written in Vhdl
ModelSimSETutorialFromTainwan
- 来自台湾一个大学生写的modelsim se的教程，相当实用，中文。-A college student from Taiwan wrote modelsim se of course, very practical, Chinese.
show_numbers
- 在八位七段数码显示管上显示8位学号，要显示的学号可以在程序内改。-In the eight seven-segment digital display tube display 8 Student ID, Student ID to be displayed can be changed within the program.
Multiplier_Solution
- this implemented multilplier in vhdl.this source code is useful for computer student and hardware engineering.-this is implemented multilplier in vhdl.this source code is useful for computer student and hardware engineering.
VHDLquickstart
- Quick introduction to VHDL – basic language concepts – basic design methodology • Use The Student’s Guide to VHDL or The Designer’s Guide to VHDL – self-learning for more depth – reference for project work-Quick introduction to VHDL
6fifo
- 入门omnet++,omnet++仿真实验，欢迎大家一起交流。-It is very useful for student who study omnet++.
lab1_VHDL
- lab VHDL for student enjoy it
Digital_System_Design_with_SystemVerilog(draft).ra
- This book is intended as a student textbook for both undergraduate and postgraduate students.-This book is intended as a student textbook for both undergraduate and postgraduate students. The majority of Verilog and SystemVerilog books are aimed
Chapter1_edu
- it is about power electronics for the student from university lecture notes-it is about power electronics for the student from university lecture notes...
HW3
- Write VHDL codes to model an 8-bit counter that counts every second. It counts from your last two digits of your student ID to your next two digits of your student ID. If the last two digits are greater than the next two digits, the counters counts d
VHDL-quick-start
- descr iption of VHDL Quick introduction to VHDL – basic language concepts – basic design methodology • Use The Student’s Guide to VHDL or The Designer’s Guide to VHDL – self-learning for more depth – reference for project work-desc
odometre
- Student project in VHDL Platform Xilinx about odometry
PID_AN
- pid with vhdl its good for student.
EDA_FOR_NEW
- 这非常适合初学者，特别是为了应付考试，它的语言简单易懂-It is very usefule for the new student to learn .The language is easy，and it is usefull for you to learn before the examtion.
hw3
- Write VHDL codes to model an 8-bit counter that counts every second. It counts from your last two digits of your student ID to your next two digits of your student ID. If the last two digits are greater than the next two digits, the counters counts d
adder3
- 加法计数器 简单的加法计数器 专用于学生学习理解-Counter counter simple addition addition dedicated to understanding student learning