搜索资源列表
mstr_mem32
- Master MemoryExamples for MT32 v1.0.0 Rtl core
v1
- 交流电压表相应的VHDL代码，帮助大家打开一下思路
PCI-T32
- PCI.VHD, THE INTERFACE MODULE WITH PCI AGENT CHIP --v1.0: For CY7C9689, First Version working on L01A chip --V2.0: For simplified PCI Agent, Xilinx and AMD chips
CJQ-V1.0-fpga
- 主要实现采集电网信号的功能，源码包括控制AD7606进行AD转换，其次实现FT3数据的传输，包括转为曼彻斯特编码-Collecting grid signal to achieve the main function, including control of AD7606 source for AD conversion, followed by the realization of FT3 data transmission, including to Manchester encoding
MAXII-Evalboard-V1.00-Designpa
- 完整的ALTERA MAXⅡEPM570试验板资料，包括原理图和PCB图，BOM表，可以直接做板。,Complete ALTERA MAX Ⅱ EPM570 test boards, including schematic and PCB diagram, BOM tables, plates can be directly done.
c8051
- USB v1.1 RTL and design specification
sdram-control-verilog
- SDRAM控制器源码，内含完整的控制器verilog源代码和测试代码，超值哈。-This readme file for the SDR SDRAM Controller includes information that was not incorporated into the SDR SDRAM Controller White Paper v1.1.
link_port-v1[1].1.0
- 用于测试ADI的TS201与FPGA之间通信的LINK程序，压缩文件内包括VHDL和Verlog代码。-ADI is used to test the communication between the TS201 and the FPGA' s LINK program, compressed file to include VHDL and Verlog code.
CJQ-V1.0-fpga
- 主要实现采集电网信号的功能，源码包括控制AD7606进行AD转换，其次实现FT3数据的传输，包括转为曼彻斯特编码-Collecting grid signal to achieve the main function, including control of AD7606 source for AD conversion, followed by the realization of FT3 data transmission, including to Manchester encoding
dbg_interface
- USB v1.1 RTL and design specification
flash_loader_II_for_2c20
- FLASH_LOADERII是cpld配置fpga的程序。运行在quartus60环境下。-Fpga configuration FLASH_LOADERII is cpld procedures. Run on quartus60 environment.
usbtrace[1].v1.1
- usb2.0 trace verilog code very useful
DHT22_v1.1
- 我以前曾发过V1.0版的，这是此版的修正版v1.1,修正了以前版本中的一个错误，即只能读一个数据后就再也读不出温度数据的错误。 这个是用Quartus II软件写的Verilog HDL语言写的与温湿度传感器DHT2x通信的代码. 里面有详细的注解. 主要用于DHT2x单线总线通信转换为8位并行总线通信,应用于具有外部8位总线访问功能的单片机直接读取温湿度数据. 此程序在EPM7128SLC-10中成功测试. -I' ve once spoke V1.0 version, whic
PL3106chipmanual
- PL3106芯片手册v1.1载波通信接收电路设计程序低压电力线载波-PL3106 chip Manual v1.1 carrier communication receiver circuit design program in power line carrier
I2C
- I2C/IIC 总线接口驱动，在Altera和Xilinx的FPGA上跑过，Verilog编写，Craftor原创。V1.1。代码中还包含了24C02的读写测试程序，可直接用。-I2C/IIC Bus Driver, written in Verilog, v1.1. By Craftor
USBhpi
- USB FX2LP TO TI5402 HPI PORT MODE BOOT V1.0\FPGA代码(Quartus)-USB FX2LP TO TI5402 HPI PORT MODE BOOT V1.0 \ FPGA code (Quartus)
HPI_GPIF
- USB FX2LP_TO TI5402 HPI_GPIF MODE BOOT V1.0FPGA代码-USB FX2LP_TO TI5402 HPI_GPIF MODE BOOT V1.0FPGA code
Verilog_RS_31_19
- RS Decoder (31,19,6) v1.1
M058_M0516-Product-Brief-SC-V1.0
- 新塘M058_M0516 Product Brief SC V1.0-M058_M0516 Product Brief SC V1.0
黑金Sparten6开发板Verilog教程V1.6
- 黑金Sparten6开发板Verilog教程V1.6(Alinx Sparten6 development board Verilog tutorial V1.6)