it is a testbench describing the function of a memory

51单片机控制自动窗帘模拟电路，有时钟、存储器、驱动等，仅有硬件设计！-51 single-chip control automatic curtains analog circuits, clock, memory, drive, etc., only hardware design!

Time Resolution for simulation is 1ps. Waiting for 1 sub-compilation(s) to finish... Compiled 4 Verilog Units Built simulation executable G:/Techscope/On going Mtech/Miniproject/1DDWT/xilinx/top_dwt_isim_beh.exe Fuse Memory Usage: 101756 KB Fuse