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Cadence Verilog Language and Simulation
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比较完整的LCD接口代码，verilog编写，分为6800和8080两种CPU接口，且有完整的仿真程序-Relatively complete LCD interface code, verilog prepared 6800 and 8080 is divided into two types of CPU interfaces, and there is a complete simulation program
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一个用Verilog HDL编的656标准图像外同步仿真程序-Synchronous simulation program in a 656 series of standard images using Verilog HDL
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dct 变换编码的verilog语言程序，已经通过模拟仿真-DCT transform coding of the Verilog language program has been through simulation
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用verilog实现的颜色插值，有带仿真-Color interpolation using verilog realize there with simulation
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在FPGA中，采用verilog HDL语言实现图像处理算法sobel，仿真实验通过-In the FPGA using verilog HDL language image processing algorithms sobel, simulation experiment
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用Verilog HDL编写的离散余弦变换，可用于视频图像压缩，并在modelsim SE6.0中仿真通过-Verilog HDL prepared with discrete cosine transform can be used for video image compression, and modelsim SE6.0 simulation through
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原创的cmos sensor摄像头的verilog模型，可作为camera控制接口的仿真和验证。-Original verilog model cmos sensor camera can be used as simulation and verification camera control interface.
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