搜索资源列表
clk_div3
- vhdl语言写的基数分频器，多平台，通过MODESIM仿真-vhdl language to write the base dividers, multi-platform, through simulation MODESIM
ad_s_machine
- 用ＶＨＤＬ实现Ａ／Ｄ转换的状态机的控制，所用的开发软件是ＱＵＡＴＴＵＳ６.０-using VHDL A / D conversion of the state machine control, used in the development of software is QUATTUS6.0
mvbc3_ise6_bak
- MVBC VHDL代码．．实现多功能车辆总线的通信-MVBC VHDL code. . Multi-purpose vehicle bus communication
POC
- 基于VHDL的POC接口控制器,用于CPU与打印机间的数据控制-based on the POC VHDL interface controller, CPU and printer for the data control
cpu_intf
- cpu的VHDL的源代码，功能的简单实现-cpu VHDL source code, the function of a simple realization
fftipcore
- 该程序是vhdl语言编写的fft变换的ip核代码，程序中共包含了36个.vhd文件-that the procedure was prepared by the vhdl language fft transform ip nuclear code CPC procedures contained 36. vhd documents
TransposedFormFIRFilterCorevhdl
- TransposedFormFIRFilterCore 基于vhdl-TransposedFormFIRFilterCore based vhdl
xx_new4
- The purpose of this lab is to introduce the concept of FSMs with a datapath, and to study the usage of more complex test benches. Also, we enforce a rudimentary design methodology by assuming that the students are part of a bigger p
code
- 数字锁相环的源代码。用硬件编程语言VHDL编写。
opencores_i2c_master
- i2c VHDL,能够实现I2C 用的是wishbone总线
HDB3byVHDL
- 基于VHDL语言的HDB3码编译码器的设计 HDB3 码的全称是三阶高密度双极性码，它是数字基带传输中的一种重要码型，具有频谱中无直流分量、能量集中、提取位同步信息方便等优点。HDB3 码是在AMI码(极性交替转换码)的基础上发展起来的，解决了AMI码在连0码过多时同步提取困难的问题
cic4
- cic 4 stages vhdl code
ALU
- vhdl 语言程序设计，包括alu, mux 部分的程序设计。
X-HDL3.2.52
- VHDL与VerilogHDL语言之间相互转换
ledctrl
- 利用74ls164控制数码管的vhdl程序，采用A与时钟两个信号共同控制，
da8
- TLV5628 8位da的vhdl控制程序，以验证
ram
- fpga中ram的vhdl的经典程序，适用于ALTERA公司器件
M_generate
- m序列产生编码，vhdl硬件实现用于实现调制解调
ofdm_demodulation
- OFDM modulation, source code written in VHDL
数字跑表VHDL
- 基于VHDL 实现1小时的数字跑表，包含计数器、数据存储等部分(VHDL realization of digital stopwatch based on 1 hours, including counter, data storage etc.)