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interfaces_for_mixed_timing_systems
- This paper presents several low-latency mixed-timing FIFO (first-in–first-out) interfaces designs that interface systems on a chip working at different speeds. The connected systems can be either synchronous or asynchronous. The designs are the
rtklib_2.4.1 卫星数据解算的程序
- rtklib 版本2.4.1 An Open Source Program Package for GNSS Positioning 日本开源网站上提供的关于卫星数据解算的程序。All of the executable binary APs for Windows are included in the package as well as whole source programs of the library and the APs. * For real-time PP
8254-Timer
- The Intel 8254 is a counter/timer device designed to solve the common timing control problems in microcomputer system design. It provides three independent 16-bit counters, each capable of handling clock inputs up to 10 MHz. All modes are softwar
fr_div
- DDS divider clock AHDL
Technology_Update_IEEE1588_v2
- The paper introduces the concept of IEEE 1588 synchronization mechanisms and explains then in more detail how PTP was enhanced, e.g. by Transparent Clock (TC), peer-to-peer delay measurement, unicast operation, pure layer 2 operation,enhanced accurac
ADSP-21262
- High performance 32-bit/40-bit floating-point processor Code compatibility—at assembly level, uses the same instruction set as other SHARC DSPs Single-instruction multiple-data (SIMD) computational architecture— two 32-bit IEEE floating-point
Designing_Multi-Asynchronous_Clock_Designs
- Challenge to design the cross-clock domain modules could resovled by a general purpose method here.
RTCdguide
- Guide for DS1307 Real Time Clock
analog-digital-clock-noise
- Noise in Mixed Signal
1-1
- 单片机数字时钟的程序，采用中断方式可以设置时间，实现小时分钟秒钟的拆分，可以手动设置时间-SCM digital clock program, the interrupt mode can set time, realize the hours of split second minutes, can be manually
GPS-Clock-Design
- 基于GPS的数字时钟设计与仿真，本科毕业论文，包含完整的设计方案-Design and Simulation of GPS-based digital clock
Clock_implementation
- This a document that introduce the RTC calendar/clock in the STM32F1xxx MCU. This document is also available from ST official site.-This is a document that introduce the RTC calendar/clock in the STM32F1xxx MCU. This document is also available from S
dianpianjiyiyunxitong
- 总 体 概 述 本设计采用AT89S52单片机作为整个系统的控制核心，具有:音乐琴, 电子钟, LED阵列扫描显示, 液晶字符显示, 循环彩灯 五个模块。音乐琴采用4X4矩阵键盘为输入键盘,共有十六个基本音, 并与其他功能组合, 具有一定的实用性与趣味性, 较好的完成题目要求。 关键词：单片机 矩阵键盘 频率 。 -A general overview of the design using AT89S52 microcontroller as the core of the con
MM02-ATOM-ESMini-2012-02-10
- MM2是德国MEN公司推出的系列超小型嵌入式CPU模块ESMini家族（95x55mm尺寸）中的一款新产品，基于intel新的E680T处理器，1.6GHz主频，1GB的DDR2 DRAM存储器，全表贴器件；支持2个Gigabit Ethernet, 1个CAN和4个COM扩展口等，提供PCI Express载板扩展口；整板最大5至7瓦的较低功耗，配上半定制的载板，非常适合需要加固应用的工业，移动应用领域。-The MM2 is an ultra-small Computer-On-Modu
LowPowerTechniques
- Low Power Design Nano‐scale designs at 130nm and below are now confronted with a power dissipation level beyond the limits of IC packaging and cooling techniques • Consequently in many designs it is not possible to increase the clock speed
physicalDesign
- IL2200ASIC Design Physical Implementation Styles ASIC Design Flow Floor and Power planning Placement Clock Tree Synthesis Routing Timing Analysis Verification and Ener
lg_g_pad_8.3_v500_cwm
- lg g pad 8.3 v500 clock work mod recovery install, use this zip from recovery or sideload.
SerDes
- 12．5 Gb／s半速率时钟数据恢复电路(CDR)的 设计及6．25Gb／s SerDes接收芯片的系统集成，设计工艺均为TSMC 0．189in CMOS工艺。-aspects：Design of Half-rate 1 2．5 Gb／s Clock Data Recovery (CDR)and Integration of 6．25Gb／s SerDes receiver．Both are realized in TSMC 0．1 89m CMOS process．
Clock
- Setup clock msp430-Setup clock msp430xxx
Analog-clock
- analog clock with the silverlight