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串口通讯VHDL源码
- 采用VHDL编写的串口通信。
VHDL实现RS232串口通信源码
- QUARTUS2下VHDL实现串口通信的源码,整个工程分四个模块:顶层,波特率产生模块,发送模块,接受模块。
VHDL串口通信(Qusrtus)
- Qusrtus工程 EP2C8Q208CN.串口通信,按键显示终端Welcome,串口控制数码管
RS232串口通信协议
- RS232串口通信协议,verilog实现,通过FPGA完全调通。,RS232 serial communication protocol, verilog achieved entirely through the FPGA transfer pass.
FPGACOM.rar
- FPGA编程实现串口通信,源代码全。包括仿真程序。,FPGA programming serial communications, the entire source code. Including the simulation program.
uart_1
- 基于VHDL的FPGA串口通讯程序,能够实现FPGA串口通信-VHDL for FPGA-based serial communication programs that enable FPGA serial communication
UART
- 本人自己编写的FPGA异步串口通信模块(UART),基于QuartusII环境,verilog语言编写,包含仿真和全部程序及说明,验证通过,具有很好的稳定性和参考价值!-I have written of the FPGA asynchronous serial communication module (UART), based on QuartusII the environment, verilog language, including simulation and all the pr
标准的串口通讯设计VHDL
- 标准的异步串口通讯设计程序——基于VHDL编程-communication design programme of standard asynchronous serial port base on VHDL programme
UART_VHDL
- 异步串口通信VHDL源代码,通过了验证,最高通信速率可达384-Asynchronous serial communication VHDL source code, through the validation, the maximum communication rate of up to 384
Uartmodule
- 实现FPGA与PC机的串口通信功能,实现数据的收发。-FPGA with the realization of PC-serial communication functions to send and receive data.
serial
- 基于VHDL的串口通信 基于VHDL的串口通信-VHDL-based serial communication based on VHDL Serial Communication
UART_SUCCESS
- 实现FPGA和上位机的串口通信,里面由波特率发生器,移位寄存器,计数器,detecter,switch,switch_bus等功能块综合而成。-FPGA implementation and the host computer' s serial communication, which by the baud rate generator, shift register, counters, detecter, switch, switch_bus such as function bl
uartverilog
- 实现cpld和pc机之间的串口通信,PC机传送到CPLD的信息,CPLD传回到PC机-Via verilog language ,cpld can communcate with pc.
chuankoutongxin
- 串口通信的概念非常简单,串口按位(bit)发送和接收字节。尽管比按字节(byte)的并行通信慢,但是串口可以在使用一根线发送数据的同时用另一根线接收数据。它很简单并且能够实现远距离通信。比如IEEE488定义并行通行状态时,规定设备线总常不得超过20米,并且任意两个设备间的长度不得超过2米;而对于串口而言,长度可达1200米。典型地,串口用于ASCII码字符的传输。通信使用3根线完成:(1)地线,(2)发送,(3)接收。由于串口通信是异步的,端口能够在一根线上发送数据同时在另一根线上接收数据。其
async_transmitter
- 该程序为RS232串口通信的VERILOG程序,在FPGA上已通过验证,在测试范围内误码率为0-The program for the RS232 serial port communications VERILOG procedures, the FPGA has been validated in the test range of bit error rate is 0
UART_rec
- fpga 串口通信 本程序在fpga开发板上实验成功-fpga serial communication program in fpga development board in this experiment was a success
uart_0910
- uart串口传输的verilog RTL级源码,已通过仿真验证。文件主要包含发送、接受位处理,发送、接受字节帧处理,对学习串口通信的朋友很有帮助-uart serial transmission verilog RTL-level source code has been verified by simulation. File mainly contains the send, receive digital processing, sending, receiving bytes of fr
UART
- 用FPGA开发的串口通信的程序,代码是用verilog编写的,希望对大家有用!-Serial communication with the FPGA development process, the code is written in verilog and hope for all of us!
FPGA
- 使用VHDL实现的串口通信程序,主要完成利用串口收发数据等功能 -Using the VHDL implementation of the serial communication program, primarily the completion of functions such as send and receive data using serial port
FPGA-UART
- 该资料是实现VHDL的串口通信(UART),RS232接口协议,-VHDL implementation of serial communication