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sgs32
- Verlog HDL 写得一款32路方波发生器，例子是4路可以自己加，相位可调，频率可调，占空比可调。具体参见readme.doc.此处只提供了源码包含顶层模块sgs32.v 子模块dds.v和pll设置模块altp.v及波形驱动文件-Verlog HDL write a 32 square-wave generator, for example, is able to add 4-way, phase adjustable, adjustable frequency, adjustable d
dds_new
- 驱动时钟加入了PLL,使得DDS的驱动时钟可变.32位的NCO使得DDS的分辨率可以做到Hz量级-Clock driver joined the PLL, the DDS makes the clock-driven variable-.32-bit NCO makes the resolution of DDS can be done Hz magnitude
FPGA-basedhigh-performance32-bitfloating-pointnucl
- 基于FPGA的高性能32位浮点FFTIP核的开发，适合fpga工程技术人员参考-FPGA-based high-performance 32-bit floating-point nuclear FFTIP development, engineering and technical personnel for reference fpga
AD9850_51_Source1
- 本文提出的采用DDS作为信号发生核心器件的全数控函数信号发生器设计方案，根据输出信号波形类型可设置、输出信号幅度和频率可数控、输出频率宽等要求，选用了美国A／D公司的AD9850芯片，并通过单片机程序控制和处理AD9850的32位频率控制字，再经放大后加至以数字电位器为核心的数字衰减网络，从而实现了信号幅度、频率、类型以及输出等选项的全数字控制-In this paper, the use of DDS as a signal of the whole core of the device fu
dds_easy
- 直接频率合成DDS模块的ise工程，可以直接下载，在Spartan3/Spartan3E上验证通过。该DDS模块可以产生双通道的不同频率的正弦波，也可以产生同频的任意相位差的相移波形。本模块累加器位数为32位，可以产生12位相位精度12位量化精度的正弦波。该设计例化一个Block Ram，为节省储存空间仅需要储存1/4周期的数据。根据需要，可以重新修改数据，改变波形。-DDS direct frequency synthesizer module ，ise project, can be dir
cpld_32
- 用VHDL语言写的一个32位DDS的程序。可以产生正弦波-VHDL language used to write a 32-bit DDS procedures. Can produce sine wave
DDS
- 简易的直接式数字频率计（DDS） 32位加法器，32位寄存器，sin_rom表-Simple direct digital frequency meter (DDS) 32-bit adder, 32-bit registers, sin_rom Table
dds32_1
- 频率合成器实例模块设计。频率分辨率为32位DDS的VHDL程序-Frequency synthesizer module design example. 32-bit DDS frequency resolution of the VHDL program
AD9850-12864
- DDS芯片的驱动程序 AD9850 频率字32位-AD9850 DDS chip driver
dds
- 32位流水线思想，任意频率任意波形信号发生器-32 pipeline thinking at any frequency arbitrary waveform signal generator
ddsProm
- dds 频率可控，32位 输出为12位 已含有.hex文件，直接装载致ROM即可~-dds frequency-controlled, 32-bit output is 12 already contains. hex file can be loaded directly caused ROM ~
VHDL-DDS
- 基于FPGA的DDS信号源设计，32位相位累加器，产生可调频率-FPGA-based DDS signal source design, 32-bit phase accumulator to generate tunable frequency
FIRPDDS
- 32阶fir数字滤波器+DDS，附有实验报告说明-32 steps fir digital filter+ DDS, with experimental report describes
imaginglib0264
- Imaging is native Object Pascal image loading, saving and manipulation library. It is available for several platforms and does not require any third party dynamic libraries or other compiled binaries. Main development language is Object Pascal
dds_cordic
- 这是我自己编的一个基于流水线结构CORDIC算法实现DDS，32位的频率控制字的输入，CORDIC算法的迭代次数为15次。-This is my own DDS based on series of the pipelined CORDIC algorithm， a frequency control word：32 bit .The number of CORDIC iterations for the 15 time。