搜索资源列表
dds
- 用vhdk编写的dds信号发生器的代码,用fpga实现dds功能-Dds with vhdk signal generator written in code, using fpga implementation dds feature
prog_dds
- FPGA VHDL DDS程序,采用FPGA实现1hz到100khz可调的dds程序,频率调节步长是变化的。-FPGA VHDL DDS program, using FPGA to achieve 1hz to 100khz adjustable dds procedures, the frequency adjustment step size is changing.
DDS
- 基于fpga技术,采用DDS原理产生3MHZ的正弦波。 -Produced with the DDS sine wave 3MHZ.
DDS_Set
- AD9852,DDS芯片接收数据逻辑。(Verilog语言)-AD9852, DDS chips receive data logic. (Verilog language)
dds
- 本设计使用8051单片机ip核,并用VHDL语言设计DDS的各功能模块,利用顶层设计的思想组合成DDS(直接数字频率综合)函数信号发生器,并与单片机ip核的I/O口相连。编译完下载到可编程逻辑器件中(FPGA),实现相应的功能。该设计中使用的是LCD2004液晶显示。-dds
FPGA(DDS)
- 采用FPGA来实现DDS,发出任意频率的三角波,方波或正弦波-Use FPGA to implement DDS, given any frequency triangle wave, square wave or sine wave
DDS__FPGA
- 基于FPGA的DDS信号发生器设计,包含Quartus 的工程,打开即可使用,Verilog 语言编写!-The DDS signal generator based on FPGA design, including the Quartus project, open to use, Verilog language! 朗读 显示对应的拉丁字符的拼音 字典- 查看字典详细内容
dds--FPGA
- 基于fpga的dds实现,对应东南大学的ESD试验箱-fpga dds
FPGA-DDS
- 直接数字频率合成器,产生频率可控的信号源。-Direct digital frequency synthesizer to generate controlled frequency source.
DDS
- 实现了基于FPGA的DDS信号源设计,能同时两路输出,输出波形包括正弦波、三角波、方波和锯齿波,且其频率和相位均可调,还能计算两路输出信号的相位差。-FPGA-based implementation of the DDS signal source design, two outputs simultaneously, the output waveforms including sine, triangle, square and sawtooth waves, and its freque
DDS-TEST-4
- 用FPGA实现DDS,有正弦,三角,方波,方波可调占空比,频率可调。能做到100K左右。-Using FPGA DDS, a sine, triangle, square, adjustable duty cycle square wave, frequency adjustable. Can do about 100K.
DDS
- 关于用FPGA制作的DDS源代码。用的是verilog语言,用的是xlinx的软件-Produced with the DDS on FPGA source code. Using verilog language, using xlinx software
ALTERA@FPGA@example
- 基于ALTERA的几个VHDL实例,如FPGA单片机,DDS的正弦信号发生器,FPGA视频监控-VHDL example:such as DDS Sine signal generator
DDS
- 基于FPGA的DDS信号发生器,实现简单的余弦信号输出- 基于FPGA的DDS信号发生器,实现简单的余弦信号输出
DDS
- DDS信号源项目总结,本文是基于FPGA的DDS设计,采用的是SPCE061A单片机的AD9851模块-DDS signal source project summary,This article is based on the FPGA DDS design, using SPCE061A microcontroller AD9851module
dds-dingcengmokuai
- FPGA DDS顶层模块 基于FPGA的dds ip核的实现,对于学习通信专业的人应该有些帮助-FPGA DDS 顶层模块
FPGA--DDS
- 文章介绍了用FPGA实现DDS的各个功能模块,实现与DDS相同的功能。-This paper introduced the method of using FPGA to instead DDS that have the same function.
DDS.ZIP
- 基于FPGA的DDS信号发生器设计,能显示至少三种波形,方波,三角波,正弦波-FPGA-based DDS signal generator design, capable of displaying at least three waveforms, square wave, triangle wave, sine wave
DDS
- 这是一个用EP2C5T144的FPGA制作的DDS信号发生器,输出信号波形可变,幅度可调,缺点是信号频率略低,带有电路图-This is a used EP2C5T144 FPGA produced DDS signal generator, the output signal waveform variable adjustable amplitude, the disadvantage is that the signal frequency is slightly lower, with
DDS
- FPGA,基于VHDL语言,用于ROM查找表的方式,实现DDS,能够输出正弦,方波,锯齿波,方波四种波形,可以改变幅值和频率。-DDS based on FPGA(VHDL)