搜索资源列表
I2CVerilog
- I2C 控制器的 Verilog源程序, 适用于FPGA等应用领域-I2C controller Verilog source code,I2C controller Verilog source code
I2C
- 对I2C总线进行读写仿真 当然必需得先装上PROTEUS-Read and write on the I2C bus must first simulation course, fitted with the necessary PROTEUS
i2c
- 这是一个I2C总线设计,同时包括了仿真验证环境，可以同过主机从机验证该I2C设计功能-this is a i2c bus verilog design ,also including the simulation environment.
I2C_v
- 对sdram的仿真程序，对sdram的仿真程对sdram的仿真程序序，-sdram
i2c
- 该压缩包包含了i2c core设计所需的详细时序说明书以及用verilog编写的core的源代码、仿真模块。-The archive contains the i2c core design specifications required for the detailed timing and preparation of the core with the verilog source code, the simulation module.
I2C
- 语言：verilog 功能：用Verilog HDL编写的I2C主机串行通信的程序。两条总线线路：一条串行数据线 SDA， 一条串行时钟线 SCL；串行的 8 位双向数据传输位速率在标准模式下可达 100kbit/s，快速模式下可达 400kbit/s ，高速模式下可达 3.4Mbit/s；在数据传输过程中，当时钟线为高电平时，数据线必须保持稳定。如果时钟线为高电平时数据线电平发生变化，会被认为是控制信号。 仿真工具：modelsim 综合工具：quartus -Language:
I2C_Verilog_Model
- 该源程序包是I2C的Verilog语言模型，包括以下4个部分：RTL源代码，测试平台，软件仿真代码，说明文件。-This source package is I2C bus model based on Verilog language. It has the following 4 parts: RTL code, testbench, sofeware simulating code, help document.
i2c
- I2C接口程序，整个工程文件，文人已仿真，下载，在ＦＰＧＡ上测试成功 verilo语言-I2C interface programme,the whole project file,I have simulated and tested in FPGA successfully .verilog language.
i2c
- verilog语言实现i2c，在ise中调试仿真-verilog language i2c, debugging simulation in ise
I2C-bus-based-on-FPGA
- 基于FPGA设计I2C总线，使用Verilog语言，ISE环境，含有仿真结果-I2C bus based on FPGA design using Verilog language, ISE environment containing simulation results
i2c-verilog-vhdl
- I2C总线VHDL/Verilog HDL源码 通过仿真验证正确，希望对大家有用-I2C bus VHDL/Verilog HDL source code is verified by simulation is correct, we hope to useful
FPGA-Verilog-I2C
- FPGA描述I2C协议过程，采用Verilog语言编写，压缩包里含有完整的代码（已经综合仿真），仿真图-FPGA I2C protocol process descr iption, using Verilog language, compressed bundle contains the complete code (already integrated simulation), simulation map
EEPROM
- EEPROM verilog仿真模块,用于测试I2C接口-EEPROM verilog simulation module
i2c_slave
- Verilog i2c slave rtl + testbench 仿真ok(Verilog i2c slave rtl + testbench)
I2C_slaver_verison3.0
- I2C从机模块，包含testbench，平台是vivado,仿真测试通过。(I2C slave module, including testbench, the platform is vivado, simulation test passed.)
i2c_24c64
- 基于verilog的i2c接口EEPROM 24lc64的测试程序，包括了eeprom的虚拟模型，实际在硬件上验证没问题，也可以通过modleism进行仿真(Verilog based I2C interface EEPROM 24lc64 testing procedures, including the virtual model of EEPROM, the actual hardware verification is no problem, you can also simulate
i2c
- I2C总线verilog仿真，quartus(I2C bus Verilog simulation, quartus)
I2C_TEST
- I2C接口读写，包含仿真文件，已经完成验证。(I2C interface reading and writing)
At24c02
- i2c 的verilog 仿真模型，可用于搭建仿真平台。(The Verilog simulation model of I2C can be used to build simulation platform.)
i2c_verilog
- 主要包含i2c的master、slave模块，和一个简单的仿真sim文件(It mainly includes I2C master, slave module, and a simple SIM file)