搜索资源列表
vhdl-pdelay
- programmable delay register (16-bit) in VHDL source code
pci_pci_express_configuration_space_access
- PCIe register access in os
register
- some thing about register
shift_regeister
- 用blockram实现移位寄存器，开发语言为verilog hdl-Shift register with blockram achieve the development language for the verilog hdl
php_ajax_example_of_source_register_register
- php ajax注册实例源码registerphp ajax example of source register register-php ajax example of source register registerphp ajax example of source register register
Supermarket_POS_cash_register_software_VC_programm
- VC编程超市POS收银软件源码Supermarket POS cash register software VC programming source code-Supermarket POS cash register software VC programming source code
attachments
- shift register code and pn sequence code
VB.cash.register.POS.device.software.programming.c
- VB编程POS收银设备软件代码VB cash register POS device software programming code -VB cash register POS device software programming code
Delphi.touch.screen.cash.register.module.design.ra
- Delphi 触摸屏收银模块设计代码Delphi code for the touch screen cash register module design -Delphi code for the touch screen cash register module design
Register
- 会员注册系统，是用asp开发的一款会员注册系统，-Register
register
- 简单8位移位寄存器的设计 设计较简单，仅供参考 免费的哦-Simple 8-bit shift register design is relatively simple design, for reference only free Oh
register
- register的简单实现，对做一些简单的C#程序有帮助！-register of the simple implementation of some simple C# program to help!
lab3_group27
- 数字电路的基本门，有register，fulladder，还有一个洗衣机的控制程序-The basic digital circuit gates, register, fulladder, there is a washing machine control program
register_file_en
- register file concept for computer science
Universal-Register
- Octal D-Type Register with 3-State Outputs -- Simple model of an Octal D-type register with three-state outputs using two concurrent statements.
Octal-D-Type-Register
- Octal D-Type Register with 3-State Outputs -- Simple model of an Octal D-type register with three-state outputs using two concurrent statements.
register
- 用Verilog语言写一个简单的移位寄存器，可以进行算术移位和逻辑移位。-Verilog language used to write a simple shift register, can be arithmetic shift and logical shift.
sr12univ_a
- universal shift register vhdl
code
- register file using verilog
shift16
- The data in the shift register in shift pulses can move or by bit right next moves left, data can be parallel input, parallel output, also can serial input, serial output, still can parallel input, output, serial input, serial, parallel output is fle