搜索资源列表
RS232串口通信协议
- RS232串口通信协议，verilog实现，通过FPGA完全调通。,RS232 serial communication protocol, verilog achieved entirely through the FPGA transfer pass.
CAN_IP.rar
- 这是CAN总线控制器的IP核，源码是由Verilog HDL编写的。其硬件结构与SJA1000类似，满足CAN2.0B协议。,This is a IP core of the CAN bus controller written by the Verilog HDL. whose structure is similar with SJA1000,supporting the protocol of CAN2.0B.
i2c_ip.zip
- I2C的ip核，Verilog实现，可以直接用在你的项目中。I2C是一种简单实用的通讯协议。,I2C' s ip nuclear, Verilog realization, you can directly use in your projects. I2C is a simple and practical protocol.
ppt
- 介绍 AXI 协议的PPT, 和一个 slave（verilog实现） 接口的简单实现，需要的可以看看；-AXI protocol described PPT, and a slave interface is simple to achieve, need to look at
HDLC
- verilog HDL语言编写的HDLC协议的IP核，包括通讯控制及CRC。-written in verilog HDL HDLC protocol IP core, including communications control and CRC.
mouse
- 基于PS/2协议的鼠标驱动程序，用Verilog语言写成，可以用于任何型号的FPGA的驱动。-Based on PS/2 protocol mouse driver written using Verilog language can be used for any type of FPGA-driven.
TCPIP
- 用C实现的完整TCP/IP协议源代码,私家珍藏的宝贝-the code of TCP/IP protocol realized by C. It s very valuable.
zigbee_sensor
- ZigBee无线模块实验.rar；基于FPGA-2C35核心；博创实验箱平台。 在quartusII里面添加uart核，利用串口与主控制机相通信，获取从控制机上传感器的的温度、湿度、光敏电阻、热敏电阻等信息（其中主控制机与从控制机是通过zigbee协议通信） -ZigBee wireless module experiment rar core on the FPGA-2C35 Borch experimental box platform. Add uart nuclear qua
handshake
- AMBA 3 AXI handshake protocol. Verilog platform. master and slave.
spi_op_core
- SPI协议的Verilog编程，包括时钟的产生模块，控制模块等-Verilog programming SPI protocol, including the selection of the clock module, control module, etc.
ahb_master1
- this is a code of AMBA AHB master protocol in verilog
i2c
- I2C协议verilog源码，包含完整的测试代码及设计文档。-Verilog source I2C protocol, including the complete test code and design documents.
BP062-BU-01000-r0p0-00rel0[1][1].tar
- AXI协议检查器，由ARM公司开发对于想开发AXI master和slave模型的ASIC设计人员非常有用！-AXI protocol checker, developed by ARM to develop for the AXI master and slave model is very useful ASIC designers!
masterdecoder
- AHB总线协议 Master实现代码，对于开发AHB总线的很有帮助-AHB bus protocol to achieve Master code, very helpful for the development of AHB bus
I2C
- Verilog实现的I2C协议，直接在ISE下打开就可以-Verilog implementation I2C protocol to open directly in the ISE can be
I2C
- 用verilog编写实现的I2C协议源码，自带控制台，解压后用ISE打开工程文件即可。-Prepared achieved with the I2C protocol verilog source code, comes with the console, after decompression project file can be opened with the ISE.
2
- RFID系统的IEEE的文章，安全协议，认证- In this paper, we first propose a cryptographic authentication protocol which meets the privacy protection for tag bearers, and then a digital Codec for RFID tag is designed based on the protocol. The protocol w
W5300_Driver_V1[1].1.1
- 硬件TCPIP协议栈芯片W5300的使用例子代码,该芯片内部通过硬件实现了TCPIP协议栈,可减少CPU运行协议栈的开销.-Hardware TCPIP protocol stack chips W5300 examples of the use of code, the chip hardware implementation of the internal adoption of the TCPIP protocol stack can reduce the CPU overhead of
CANProtocolControllerIPCoreinVerilog
- 一种基于CAN协议的IP核源代码，用Verilog语言实现-CAN Protocol Controller IP Core in Verilog.
用FPGA实现简单的UDPIP通信
- 使用verilog语言实现了UDP协议网络通信(Verilog protocol is used to realize UDP protocol network communication)