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UART.rar
- 主芯片：Actel的FPGA030,Verilog语言,串口发送和接收的例程，开发环境：LiberoIDE 8.5,The main chip: Actel' s FPGA030, Verilog language, the serial port to send and receive routines, development environment: LiberoIDE 8.5
Fusion_ABC_UART_2009_03_17
- Actel Fusion System Management Development Kit UART Example. Contains Libero design using CoreABC. Program prints text to UART.
Actel_Igloo_nano_UART
- This FPGA project include a simple version of the UART for Actel Igloo nano.
uart
- 本程序的功能是实现串口通信，采用232传输协议，编码方式为8B/10B转换，即一位起始位，8位数据位，一位停止位，在actel Fusion系列开发板上得到验证，具有很强的通用性。本程序的编程语言为Verilog.-This procedure is to achieve the functions of serial communication, the transfer protocol is 232.The encoding protocol is 8B/10B , that is, a
UART_LCD
- 基于Actel的Fusion系列FPGA的UART串口，带FIFO-Based on Actel s Fusion Series of FPGA serial UART with FIFO
UART
- actel 公司 Fusion StartKit开发板串口实验，采用veilog 语言编写，易于理解-actel Company Fusion StartKit development board serial experiments using veilog language, easy to understand
UART
- 基于Actel公司的硬件开发平台，实现异步通信-Based on Actel hardware development platform, and realize the asynchronous communication
VerilogUart
- UART 串口通信模块，Verilog 实现。已在Microsemi Actel FPGA A3PE1500 硬件验证通过。-UART serial communication module, Verilog implementation. Verified by Microsemi Actel FPGA A3PE1500 hardware.
CoreUartTest
- Actel FPGA UART 串口通信模块，调用Actel CoreUART IP核实现。已在Microsemi Actel FPGA A3PE1500 硬件验证通过。-Actel FPGA UART serial communication module, call Actel CoreUART IP core implementation. Verified by Microsemi Actel FPGA A3PE1500 hardware.