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19854799dul_ram(yk)
- 双口RAM的FPGA源码Altera 活XIinx或ATmel公司都可以-Dual-port RAM of the FPGA source
altera
- something i got you may find this useful
DDR
- leon ep2s60 ddr use altera statix2 and add ddr sdram-leon ep2s60 ddr
FPGA4U
- 采用Altera公司的CycloneII芯片EP2C8的一些程序代码。-The use of Altera Corporation CycloneII chip EP2C8 some program code.
word
- Code was successfully implemented within ALtera FPGA with Quartus 6.0. It presents two polish own female names: ULA and ALA whose are scrolling on the 4-columns crystal LED. When you press the switch it will turn from ULA into ALA and continue scroll
my_fsm_vhdl
- How to infer a finite state machine for fpga altera xilinx
srl_test
- how to infer a shift register for fpga altera xilinx
cordic_generic
- 本人根据opencores.org上的cordic算法改写的可配置位宽的cordic算法，并且在原始的级联型的基础上编写的循环(iterative)型的cordic,可通过generic配置。带一个不可综合和可综合的testbench(for altera)。稍微改动可应用于xilinx fpga-a generic synthesizable cordic with 2 modes: cascade and iterative. based on opencores.org version,
DE2_USB_API
- 这是ALTERA 公司的DE2开发板上的关于USB API开发的例子-This is ALTERA' s DE2 Development Board regarding the USB API to develop examples of
altera_cic_compensate_ip
- 级联积分梳妆滤波器的补偿滤波器，altera公司IP-altera cic compensate filter
fir_compiler-v3.3.1
- ALTERA公司的quartusII fir_compilier-v3.31对工程师很有帮助的哦-ALTERA company quartusII fir_compilier-v3.31 helpful for Engineer
alterapcbtu
- xilinx和altera的下载电缆电路图。 altera_dl.pcb是altera下载电缆的PCB版图，protel 98格式， 可放在一个并口盒里。已经实践验证，保证可用。-Xilinx and altera circuit diagram of the download cable. altera are altera_dl.pcb download the PCB layout cable, protel 98 format, can be placed in a par
tree_pro
- 用FGGA 原理图的形式输入，包括仿真，最终下载的文件等，已经在Altera 公司的FPGA板子上运行没有问题-This source is written by verilog,it is functioned in a FPGA board of Altera corporation.
my_first_nios2_software_tutorial
- quick start altera NIOS2 programming
diglab1
- altera DE2开发板配套的数字显示文件程序altera DE2开发板配套的数字显示文件程序-altera DE2 development board supporting documentation procedures figures show altera DE2 development board supporting documentation procedures figures show
DE2_Default
- altera DE2自带的默认检测程序 可以测试所有器件-altera DE2 own default testing procedures to test all devices
FSKmodulationanddemodulation
- FSK调制与解调，整个设计基于ALTERA公司的QuartusⅡ开发平台，并用Cyclone系列FPGA实现。所设计的调制解调器具有体积小、功耗低、集成度高、软件可移植性强、扰干扰能力强的特点,符合未来通信技术设计的方向。-FSK modulation and demodulation, the entire design is based on ALTERA' s development platform Quartus Ⅱ, and Cyclone series FPGA implem
clock_0
- nios cpu test code this code was generated by altera tool automatically. You can obtain this code from the SOPC builder
EP1C6Q240-8REG_WR
- altera公司的FPGA的一些开发用的VHDL的源代码用于学习-altera INC. develop fpga vhdl source for study and research
ConfiguratinProgramMethod
- 单片机配置现场逻辑器件的功能，一种不同寻常的配置方式，灵活简单-MCU CONFIG FPGA Configuration/Program Method for Altera Device