搜索资源列表
fpga
- FPGA开发基础例程实验代码，来自特权同学，十分实用，通俗易懂。-The FPGA development foundation routine experimental code from a privileged students, very practical, easy to understand.
Protel99_lib_ALTERA
- 比较全的ALTERA芯片的原理图和封装库(Protel99)，对需要画Altera FPGA PCB版图的同志很有用。-Comparing all the ALTERA chip schematic and footprint library (Protel99), on the need to draw Altera FPGA PCB layout comrades useful.
PCMverilog
- 实现了数字通信系统中PCM编码，用Verilog硬件描述语言编程在FPGA上实现的。-Achieved in the PCM coded digital communication system, using Verilog hardware descr iption language programming implemented on the FPGA.
ads1278
- AD1278的接口程序，Verilog的。包含TESTBENCH，仿真通过。尚未在硬件上调试。-the interface between fpga and ad1278,contain testbench.
FPGA_common_idea
- 本文讨论的四种常用FPGA/CPLD 设计思想与技巧：乒乓操作、串并转换、流水线操作、数据接口同步化，都是FPGA/CPLD 逻辑设计的内在规律的体现，合理地采用这些设计思想能在FPGA/CPLD 设计工作种取得事半功倍的效果。-This article discusses the four commonly used FPGA/CPLD design ideas and techniques: ping-pong operation, strings, and conversion, pipe
I2C_24C02
- FPGA通过iic协议读写24c02，并将内容通过指示灯显示。-FPGA read and write 24c02 according to ii2 and show the data through led
fft
- FPGA控制串行AD（AD0804）,状态机实现，可以根据该程序实现数字电压计，数字温度计的设计-FPGA serial control AD (AD0804), state machine to achieve, you can program according to the number of voltage, the digital thermometer design
PCI9054source
- 这是9054里自带的FPGA的跑马灯的源程序-This is the 9054 where the FPGA comes with the source code of the Marquee
DSSS-Transmitter
- 北斗定位系统卫星下行信号的基带处理部分——基于FPGA的直接序列扩频发射机的设计与仿真。-Beidou Positioning System satellite downlink of the baseband signal in part- based on direct sequence spread spectrum FPGA Design and Simulation of the transmitter.
FPGA设计基础
- FPGA设计基础.rar
i2c
- fpga verilog I2c 和 用以DSP mcbsp程序，测试过了-fpga verilog I2c and for the DSP mcbsp procedures, tested the
spitoi2s3
- spi转i2s的verilog程序，fpga是总模块，spi和i2s是子模块，shiftreg是转换-spi transfer i2s the verilog program, fpga is the total module, spi, and i2s is the sub-module, shiftreg is to convert
c4gx_f896_host_ddr2a_odt
- ALTERA PCIE FPGA开发板（EP4C平台）DDR2内存测试代码-ALTERA PCIE FPGA development board (EP4C platform) DDR2 memory test code
FPGA-modules-code
- CPLD/FPGA常用模块与综合系统设计实例精讲-图书源码-Commonly CPLD/FPGA module with integrated system design examples succinctly- Book source
AD9512_VHDL
- FPGA通过SPI总线控制Analog公司的射频时钟分配芯片的程序，在需要用到高速时钟（GHz）的电路中经常采用，比如数据采集卡及信号回放卡中会经常用到该功能，已经在产品中得到验证，工作稳定。-The VHDL code of controlling AD9512 of Analog Device
CyclonePLL
- Cyclone™ FPGA具有锁相环（PLL）和全局时钟网络，提供完整的时钟管理方案。Cyclone PLL具有时钟倍频和分频、相位偏移、可编程占空比和外部时钟输出，进行系统级的时钟管理和偏移控制。Altera® Quartus® II软件无需任何外部器件，就可以启用Cyclone PLL和相关功能。本文将介绍如何设计和使用Cyclone PLL功能。 PLL常用于同步内部器件时钟和外部时钟，使内部工作的时钟频率比外部时钟更高，时钟延迟和时钟偏移最小，减小或调整时钟
CRC32
- 基于FPGA平台的用verilogHDL设计的CRC32模块-a code for CRC32 based on FPGA by verilogHDL
dds
- 基于VHDL+FPGA的DDS信号发生设计，已经通过调式-Based on VHDL+ FPGA design of the DDS signal has been through mode
I2C
- i2c ipcore of altera fpga that uses ahdl lauguage.
lcom
- 很经典的单片机程序，可以实现单片机与FPGA的通信-Is the classic single-chip process can be achieved with single-chip FPGA communications