搜索资源列表
LCD
- LCD显示实验。要求熟悉LCD显示的驱动原理，在实验板的LCD显示屏上显示“FPGA”，并且尝试任意字符的显示方法，动态显示的设置。-LCD display experiment. Requirements are familiar with LCD display drive principle, the experiment LCD panels display FPGA , and try any of the characters display methods, dynamic di
FPGA_BT_656
- 采用FPGA通过BT_656接口实现传输4路视频流的方法 -FPGA through the use of BT_656 interface 4-way video stream transmission method
VLYNQ_Xilinx_FPGA
- 通过 VLYNQ 把 Xilinx FPGA 作为 TI DSP 的外设.rar-Through VLYNQ the Xilinx FPGA as the TI DSP peripherals. Rar
DSP_design_based_on_FPGA
- 用FPGA设计DSP,2007年上海FPGA高级研修班清华博士贺光辉讲义-FPGA Design with DSP, 2007 in Shanghai FPGA advanced training classes Tsinghua notes Dr. He Guanghui
FPGA_design
- 基于FPGA的嵌入式系统设计，2007年上海FPGA高级研修班张卫军老师讲义-FPGA-based embedded system design, FPGA Shanghai in 2007 ZHANG Wei-jun teachers advanced training class notes
FPGA27examples
- FPGA有价值的27例，通过学习这些例子可以快速掌握FPGA设计流程-27 cases of valuable FPGA, through the study of these examples can quickly grasp the FPGA design flow
nerualnetwork
- 本文为通信专业硕士研究生的毕业论文。主要研究神经网络的FPGA实现及其在网络拥塞控制中的应用。 -In this paper, for the communications professional Master s thesis. Major study of the FPGA realization of neural networks and its application in network congestion control applications.
ADC0809
- 用CPLD/FPGA驱动ADC0809芯片的VHDL源程序-Using CPLD/FPGA drive ADC0809 chip VHDL source
I2C
- FPGA I2C
xapp529_6_1
- 一些有用的IP核，本人也是刚涉及FPGA到开发，特别希望前辈们能够共享一些关于图像处理方面的IP核-Some useful IP core, and I was just involved in FPGA to development, particularly the older generation to share some information about aspects of image processing IP core
lpl
- 用于数字下变频器的 FPGA 实现 -Digital Down Converter for the FPGA to achieve
s_filter
- fpga实现图象滤波，实时的实现对输入图象的形态学滤波-FPGA realization of image filtering, real-time realization of the input images of morphological filtering
sha_core
- 安全散列函数的VERILOG实现，通过了fpga验证，在系统正可以直接当IP盒应用-Secure Hash Function VERILOG achieve, through the FPGA verification, the system is can be directly applied when the IP box
Fifo
- 一个FIFO源代码，基于Altera FPGA-A FIFO source code, based on Altera FPGA
usbin_v1.7
- 用于cy7c68013与fpga的从FIFO通讯.版本1.7-For the CY7C68013 and FPGA communications from the FIFO. Version 1.7
butfly4
- 基4-FFT蝶形单元实现，按照FPGA内部的乘法器功能编写的-4-FFT butterfly-based unit to achieve, in accordance with the internal FPGA multiplier feature prepared
AM
- FPGA内AM调制工程。内带调制波、载波生成。关键词：FPGA verilog AM DDS-AM modulation works within the FPGA. Within the band modulation wave generated carrier. Key words: FPGA verilog AM DDS
COUNTER
- 对外部输入的高频脉冲信号进行分频，应用于FPGA/CPLD .-External input of high-frequency pulse signal frequency, applies to FPGA/CPLD.
FPGA_jiaocheng_yu_shiyan
- 最重要的是七个从简单到复杂的实验，包括：基础实验一_FPGA_LED 基础实验二_seg7实验以及仿真 基础实验三_SOPC_LED 基础实验四_Flash烧写 基础实验五_定时器实验 基础实验六_按键以及PIO口中断实验 实验七_网卡使用 ，这些实验室用到了SOPC BUILDER 与NOIS ii ,使用Verilog 编写，有实验板和没有实验板的都可以用来学习。 其次还包括： FPGA开发板各存储器之间的联系、 多处理器文档 、 USB_UART等文档，很好用的文档，您下了相信不会后悔！-
ASIC_and_FPGA_Verification
- ASIC/FPGA验证经典资料，英文版，希望大家可以有所借鉴。-ASIC/FPGA verification classic information, in English, I hope that we can learn from there.