搜索资源列表
verilog-coding-rules
- Verilog HDL可综合RTL级代码设计规范及风格-Verilog HDL RTL level code design specifications and style
VERILOGUSB2.0-IP
- USB IP核 verilog 语言 完整的use ip核-use ip verilog HDL
A-Verilog-HDL-Test-Bench-Primer
- 学习资料：详细说明了如何用Verilog语言编写Testbench文件-Learning materials: detailed descr iption of how to use Verilog language Testbench file
april2010_1
- 基于FPGA的方向滤波指纹图像增强算法实现，本文利用FPGA具有丰富寄存器资源、可满足高速系统设计等特点，设计了一种基于FPGA纯硬件方式实现方向滤波的指纹图像增强算法。设计采用寄存器传输级（RTL）硬件描述语言（Verilog HDL），利用时分复用和流水线处理等技术，完成了方向滤波指纹图像增强算法在FPGA上的实现。-Directional filtering fingerprint image enhancement algorithm based on FPGA using the FP
Verilog-CAN-controler
- verilog hdl 语 言 实 现 的 CAN 控 制 器-CAN controller verilog hdl language
Principles-of-Verifiable-RTL-Design
- 本书主要以HDL（verilog/vhdl）为例，详细讲述了在IC DESIGN FLOW中 Verification 以及Test的设计思想、方法和技巧，涵概了测试的各个方面， 是目前进行IC设计的同仁们最为推荐的一本宝典-Book HDL (verilog/vhdl), a detailed account of the IC DESIGN FLOW, Verification and Test of design ideas, methods and techniques, and
Quartus_II
- Quartus_II官方教程-中文版,适合VHDL及VERILOG HDL语言学习者使用-Quartus_II the Official tutorial- Chinese version for VHDL and VERILOG HDL language learners
verilogPHDL
- verilog+HDL经典教程 很详细的编程资料，而且浅显易懂-verilog+HDL classic very detailed tutorial programming information, and easy to understand
Handboook-Bucknell
- Handbook on verilog HDL
veriloghdl
- verilog HDL 实用教程 包含基础的概念和一些简单应用实例-the verilog HDL practical tutorial contains the concept and some simple application examples
I2C
- 基于hdl的i2c开发学习资料，仅供参考，但是对初学者有用。-Based on the the hdl i2c development learning materials for reference only, but is useful for beginners.
vedicmuliplier
- Vedic multiplier design in Verilog HDL
ripple-carry-array-mult
- Ripple carry array multiplier design in verilog HDL
carrysave-array-mult
- Carry save array multiplier design in verilog HDL
高速图像压缩编码器的VLSI结构设计研究
- 高速图像压缩编码器的VLSI结构设计研究.kdh 相当有水平的博士论文。里面详细讲到了如何设计小波变换VLSI结构。并对verilog hdl设计结构进行了评估-The high-speed image compression VLSI architecture design of the encoder the study. Kdh quite the level of Ph.D. thesis. Which talked about in detail how to design VLSI
verilogHDL
- 夏雨闻经典Verilog HDL详介绍了verilog HDL语法规范和无数经典例程，是和初学者学习，简单易懂。-Xia Yu Wen the classic Verilog HDL detailed introduction verilog HDL syntax specification and countless classic routines, and for beginners to learn, easy to understand.
New-folder
- Full HDL code for decoder.
Verilog-HDL
- 重点介绍verilog VHL语言结构及使用方法-Highlights verilog VHL language structure and use
High-speed-Digital-Design
- 高速数字设计，针对verilog HDL，中文版-High-speed digital design verilog HDL, the Chinese version
fpga-draw
- 二维图形加速器设计与实现。采用Verilog HDL语言对各功能模块进行了设计,包括画线、画圆、画椭圆、多边形填充以及区域复制等,总结了一套将算法使用硬件描述语言实现的一般流程.这是本人花了50大洋买的，吐血奉献-Design and implementation of a two-dimensional graphics accelerator. Using Verilog HDL language of each functional module design, draw lines, d