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MIPS五级流水线模拟程序
- MIPS五级流水线模拟程序，能执行简单的MIPS指令，模拟流水线状态及寄存器结果，实现cpu流水的概念-MIPS five-level stream-line simulation program, this program can execute simple MIPS instruction, simulat stream-line s status and register result, and it implements stream-line of cpu.
MIPS
- 组成原理大作业--基于MIPS的运算器设计，内附详细设计文档，包含设计文档和使用手册，主程序，测试程序，还有设计的框图等。实现了可以执行基本的MIPS有关运算器相关的指令共17条，用Verilog编写。-Composition Principle big operation- based on the MIPS computing design, containing a detailed design document, including design documentation and u
MIPS
- mips处理器指令仿真器，可查看流水线执行方式-mips instruction processor emulator, you can review the pipeline implementation
mips-iv
- MIPS IV Instruction Set,详细讲解了mips iv的指令系统-MIPS IV Instruction Set, detailed account of the instruction set mips iv
cpu
- 基于MIPS指令集的32位CPU设计与VHDL实现-Based on the MIPS instruction set of the 32-bit CPU design and the realization of VHDL
mips-iv
- MIPS 指令集，比see mips 更适合用作手册使用-This appendix describes the instruction set architecture (ISA) for the central processing unit (CPU) in the MIPS IV architecture. The CPU architecture defines the non-privileged instructions that execute in user mode.
MIPS
- 支持MIPS指令集中最基本六条指令的简单的汇编代码到二进制形式-Support the MIPS instruction focused on the most basic 6 of assembly code instructions to a simple binary form
CU
- mips指令控制器。fpga上板验证实现。为cpu课设重要模块-mips instruction controller.
CPUsourcecode
- 本设计实现了一个具有标准的32位5级流水线架构的MIPS指令兼容CPU系统。具备常用的五十余条指令，解决了大部分数据相关，结构相关，乘除法的流水化处理等问题，并实现了可屏蔽的中断网络。-This design implements a standard 32-bit 5-stage pipeline architecture of MIPS instruction compatible CPU system. Instructions with more than 50 commonly use
32mips-cpu
- 基于32为MIPS指令设计的cpu，32 for the MIPS instruction based on the design of the cpu-32 for the MIPS instruction based on the design of the cpu
08-MIPS-arithmetic.pdf
- dsp processor mips instruction implementation plan-dsp processor mips instruction implementation plan
mipsAsm
- 简单的MIPS汇编模拟器，可以模拟模拟MIPS汇编，将MIPS指令转换为二进制。-Simple MIPS assembly simulator can simulate the simulated MIPS assembler, MIPS instruction will be converted to binary.
see-mips-run-
- mips处理器的计算机体系结构，mips指令与C语言之间的转换-mips processor computer architecture, mips instruction and C language conversion between
MIPS-and-CPU-design-and-simulation
- 兼容MIPS指令集的CPU设计与仿真 处理器架构为多周期，指令用32为字长（取指占一个周期），4k的存储器（指令存储器和数据存储器分开），IO与存储器统一编制，能支持20条指令以上-MIPS instruction set compatible CPU design and simulation
mips
- mips指令的编译器，支持常用指令，可以加入注释-mips instruction compiler, supports common commands, you can add notes
MIPS-architecture-vol-IIa
- 本书详细的讲解了MIPS的所有指令，包括二进制码的形式，功能描述及讲解。-The book explains in detail all the MIPS instruction, including binary code form, function descr iption and explanation.
mips
- Verilog语言开发的基于mips指令集的流水线cpu，只支持部分指令-Verilog language-based development pipeline cpu mips instruction set support only part of the instruction
MIPS-master
- Mips指令模拟器，实现基本指令的的运行过程，相应的寄存器，内存，alu pc 的数值状态-mips instruction simulation
MIPS32指令集
- MIPS指令集介绍，详细说明每个指令用法，汇编语言必要的参考手册 MIPS32为汇编指令集介绍(MIPS instruction set introduction, detailed instructions for each instruction usage, the necessary reference manual in assembly language MIPS32 is an introduction to assembly instruction set)
单周期完成版
- 写一个单周期处理器运行一段mips指令，并包含mips指令转汇编码的程序(Write a single cycle processor to run a section of MIPS instruction)