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八位的伪随机数产生的verilog文件linear-feedback-shift-register-eight pseudo-random number generator in Verilog document linear-feedback - shift-register
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用Verilog实现的移位寄存器,可以实现左移、右移等功能,Using Verilog implementation of the shift register, you can achieve the left, shifted to right and other functions
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8位双向移位寄存器:
实现串行数据与并行数据的转换,移位寄存数据功能的,8-bit bi-directional shift register: the realization of serial data and parallel data conversion, data storage function of displacement
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伪随机序列产生器-线性反馈移位寄存器,Verilog HDL 原代码。-Pseudo-random sequence generator- linear feedback shift register, Verilog HDL source code.
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Verilog桶形移位寄存器,实现不溢出移位-Verilog barrel shift register, the shift towards non-overflow
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用verilog HDL语言,通过一个4位移位寄存器实现一个信号转化为HDB3码并进行测试
-Using verilog HDL language, through a 4-bit shift register realization of a signal into HDB3 code and test
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verilog实现的8阶伪随机序列发生器,文件包含了三种主要模块:控制模块,ROM模块,线性反馈移位寄存器(LFSR)模块。已经通过modelsim仿真验证。-verilog to achieve 8-order pseudo-random sequence generator, the file contains three main modules: control module, ROM modules, a linear feedback shift register (LFSR) mo
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伪随机序列产生器-代进位反馈移位寄存器,verilog hdl 原代码。-Pseudo-random sequence generator- on behalf of binary feedback shift register, verilog hdl original code.
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伪随机序列产生器-filtered 代进位反馈移位寄存器,verilog hdl 原代码。-Pseudo-random sequence generator-filtered on behalf of binary feedback shift register, verilog hdl original code.
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Shift register verilog code
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shift register. vhdl verilog
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用blockram实现移位寄存器,开发语言为verilog hdl-Shift register with blockram achieve the development language for the verilog hdl
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文件包含了寄存器,移位寄存器,可能计数器,计数器等用VHDL实现的功能模块。-File contains the register, shift register, may counter, counter, implemented with the VHDL modules.
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shift register verilog code
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linear feedback shift register verilog code
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两种移位寄存器——通用和桶形移位寄存器,用硬件描述语言Verilog编写,适合初学者。-Two kinds of shift register- common and barrel shift register in Verilog hardware descr iption language, suitable for beginners
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Shift register and testbench in verilog
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Verilog based 64 bit shift register design
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FPGA/CPLD 的verilog移位寄存器代码。-verilog shift register code.
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多种基本功能的Verilog代码实现,包括多路选择器,二进制到BCD码转换,二进制到格雷码转换,7段译码器,8位数据锁存器,移位寄存器等等多种功能。(Verilog code implementation of a variety of basic functions, including multiplexer, binary to BCD code conversion, binary to Gray code conversion, 7-segment decoder, 8-bit dat
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