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freq_m
- 基于FPGA的verilog语言编写的频率计-Meter based on the frequency of the FPGA verilog language
fre
- verilog hdl 开发的频率计，运行环境 DE2-115开发板，内有modelsim仿真用的testbench。RTL级代码-verilog hdl developed frequency meter, operating environment, the DE2-115 development board, modelsim simulation of the testbench. RTL-level code
sopc
- FPGA Verilog，描述频率计的制作，主要是为了提高频率计的精度，以及很多其它的-FPGA Verilog
Frequency-tester
- 数字频率计，能自动测试输入方波脉冲的频率，通过LCD1602显示，是用Verilog HDL写的-Digital frequency measurement，Can automatic testing input square wave pulse frequency, through the LCD1602 shows, it is to use Verilog HDL write
project9_freq_counter
- 数字频率计的设计,基于VERILOG的数字频率计的设计-Digital frequency plan design, based on the number of VERILOG frequency meter design
pinlvji
- 频率计能测频率 周期 高脉宽 低脉宽 频率计能测频率 周期 高脉宽 低脉宽-verilog prepared using high-speed string-type DA-chip dac121 driver code, occupation le small, high efficiency, the current I applied to more products
pinlvji
- 使用verilog语言设计一个3位十进制数字式频率计，其测量范围为1MHz，量程为10kMz,100kMz和1MMz三档（最大读数分别为：9.99kMz，99.9kMz和999kMz）-Use verilog language, design a three decimal digital frequency meter
Frequency
- 频率计，用verilog编写。语言简洁易懂。-Frequency counter, written in verilog.
012-fre_tst
- verilog写的频率计，利用在一周期内计数方式，测试可用，500KHZ以上误差大-verilog to write the frequency meter, the test can be used
FTEST2
- Verilog语言，等精度频率计/测脉冲宽/测占空比-Verilog language, and other precision frequency meter/measuring pulse width/measured duty cycle
Frequency-meter
- 用Verilog语言编写的频率计，可以精确到1Hz-Frequency counter with the Verilog language, can be accurate to 1Hz
frequency
- 用verilog编写的频率计项目，能够自动换量程-Written in verilog frequency meter project, to wrap range
freq
- 等精度频率计的verilog实现，经过quartus编译-Verilog to achieve equal precision frequency meter
frequency-counter
- 这是用verilog写的配合DE2 FPGA开发板的10进制显示频率计的工程文件夹的压缩包，解压后可直接下载到DE2板上，其中频率输入端是系统自带27M时钟D13用于测试，如果想要应用于别的开发板，可以重新分配引脚。-DE2 FPGA development board with with verilog write with decimal display frequency meter project folder compression package, after decompressi
freq_meter
- 使用verilog写的频率计，可切换档位-Frequency counter using verilog write switch stalls
digital-frequency-counter
- 基于FPGA的数字频率计，verilog hdl编写-digital frequency counter ，using verilog hdl
lab2_Freq_20120510
- 用verilog写的频率计，上课的时候用的。Spartan - 3E开发板。-verilog
control
- 用Verilog HDL 语言描述的自动转换量程频率计控制器-Automatic conversion range frequency meter controller described using Verilog HDL
fpga
- 这是一个利用verilog HDL语言编写的自动频率计设计项目，能运行-This is a verilog HDL language automatic frequency meter design projects, and be able to run
Verilogpinlvji
- 基于verilog HDL的频率计设计，多个模块，误差较小。-Based on the the verilog HDL frequency meter design, multiple modules, the error is smaller.