搜索资源列表
LowFreCounter
- 实现对低频信号进行等精度测量的频率计verilog hdl代码-Realization of low-frequency signals, such as precision measurement of the frequency code verilog hdl
EDA_project
- 基于Verilog和VHDL的DDS程序 基于VHDL的8位十进制频率计 -Verilog and VHDL based on the DDS process VHDL-based 8-bit decimal Cymometer
pinlvji
- 数字频率计的Verilog HDL语言实现，已经通过仿真-Digital frequency meter Verilog HDL language implementation has been through simulation
ondometer
- 用verilog语言编写的运行与FPGA上的基本的频率计程序，有各种数量级的精度，开发环境为quartus2-ondometer written by verilog
digital_frequency
- 用verilog实现数字频率计的设计，具有自动换挡功能，采用t法和m法设计，低频显示周期。量程为0.5~10Mhz。开发环境为quartus-This is a method of designing a digital frequency-measuring device. It can measure frequency ranging from 0.5Hz to 10MHz. It is developed in the program of Quartus.
pinlvji
- 用Verilog语言实现较高精度简易的数字频率计！-Verilog language with high accuracy simple digital frequency meter!
DDS
- 数字频率计 DDS，使用Verilog编写-Digital frequency meter DDS, prepared using the Verilog
frequency
- 基于FPGA的verilog语言频率计设计-Design of FPGA-frequency meter
instance_f_meter
- 用元件例化的方法实现了频率计的设计，采用的是Verilog语言，实现了较准确的频率测量的功能，最高测量频率可以达到50M左右。-Case of the method of components to achieve a frequency meter design, the use of the Verilog language, to achieve a more accurate frequency measurement function, the maximum measurement
counter
- 本文介绍了基于FPGA的数字频率计的设计方法，设计采用硬件描述语言Verilog ，在软件开发平台ISE上完成，可以在较高速时钟频率（48MHz）下正常工作。该数字频率计采用测频的方法，能准确的测量频率在10Hz到100MHz之间的信号。-This article describes the FPGA-based digital frequency meter design method using hardware descr iption language Verilog, ISE on t
fre_counter
- 用verilog实现的确数字频率计,内部含有各个功能模块-Verilog implementation is actually using digital frequency meter
freqency
- verilog语言 写的 频率计 ，可在1602液晶上显示，代码齐全，经过验证。-verilog language written in the frequency meter can be displayed on the LCD in 1602, code complete, proven.
plj_book
- EDA，verilog 语言写的频率计，一个是测频，一个是产生一定的频率作为信号源，可在cycloneII 上验证，-EDA, verilog language written in frequency counter, one frequency measurement, one is a certain frequency as the signal source can be verified on the cycloneII, thank you! !
11
- 等精度频率计，verilog语言写的，可在开发板上验证，已经试过-And other precision frequency meter, verilog language, and can be verified on the development board, has tried
Cymometer
- 这是本人用verilog语言做的频率计！对于硬件来说是很好的程序.-This is my language to do with verlog frequency counter!
frequence
- 基于verilog语言的频率计，大三的时候写得，我感觉不错哦-Verilog language based on the frequency meter, junior, when written, I feel good, oh
report-of-digital-pluse-counter
- 某一大学里关于数字频率计的电子实验报告,内容详尽,含verilog源码-A university on the electronic digital frequency meter test reports, and detailed, with verilog source
frequency_meterd
- 用verilog编写的一个可测1~10mhz的频率计-Verilog write with a measurable 1 ~ 10 MHZ frequency meter
freq_detect
- verilog写的数字频率计，用七段数码管显示-verilog to write the digital frequency meter
FREQ
- 该程序使用verilog编程语言，实现了频率计-The program use verilog programming language, realized the frequency meter