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vhdl程序集
- 本人初学VHDL时编的比较系统的VHDL源程序 巨实用 -I am learning more systematic series of practical VHDL source Giant
usart.rar
- USART coded in VHDL. It is writted in 5 files. I am uploading the files in order. ,USART coded in VHDL. It is writted in 5 files. I am uploading the files in order.
am.rar
- 基于matalab simulink中dspbuider实现am调制，将mdl文件转化为vhdl文件，在quartus2里面进行下载验证,Matalab simulink based on the realization of dspbuider modulation am to mdl file into vhdl file, download it in quartus2 authentication
MC1496
- 使用MC1496实现AM调制的PDF格式说明书。-AM modulation using MC1496
fpga
- VHDL写的fpga程序，可产生三角波，方波据此波，正弦波，可实现任意频偏的调频，调相，调幅-Fpga write VHDL program can generate triangle wave, square wave accordingly wave, sine wave, can achieve any frequency offset of the FM, PM, AM
AM
- FPGA内AM调制工程。内带调制波、载波生成。关键词：FPGA verilog AM DDS-AM modulation works within the FPGA. Within the band modulation wave generated carrier. Key words: FPGA verilog AM DDS
components
- USART coded in VHDL. It is writted in 5 files. I am uploading the files in order.
rd_wr_control
- USART coded in VHDL. It is writted in 5 files. I am uploading the files in order.
tx_buff
- USART coded in VHDL. It is writted in 5 files. I am uploading the files in order.
rec_buf
- USART coded in VHDL. It is writted in 5 files. I am uploading the files in order.
FPGA_AM
- 基于cyclone系列FPGA的模拟幅度调制的VHDL代码-Cyclone series FPGA-based simulation of VHDL code amplitude modulation
leon3
- 这个一个基于amba总线的leon3处理器的vhdl语言程序描述，学习fpga总线开发的请看-The amba bus-based processor vhdl language leon3 procedures described in the study developed fpga see bus
P12864
- 12864液晶的子程序模板，本人正在使用，并行接法-Subroutine 12864 liquid crystal template, I am being used, parallel connection
ZX
- 本系统以51单片机及FPGA为控制核心，由正弦信号发生模块、功率放大模块、调幅（AM）、调频（FM）模块、数字键控（ASK，PSK）模块以及测试信号发生模块组成-The system of 51 single-chip and FPGA for the control of the core module by the sinusoidal signal, power amplifier module, AM (AM), frequency modulation (FM) module, dig
light
- 用vhdl语言实现交通灯控制，可以用quartus2软件打开并仿真，经本人仿真无误。-Vhdl language used to control traffic lights can be turned on and quartus2 software simulation, simulation accuracy, as I am.
dds_9760_OK
- ＤＤＳ信号源程序，用ＶＨＤＬ编的。里面可用拨码开关选择相应的功能：ＦＭ，ＡＳＫ，ＰＳＫ，ＡＭ（这一点实现的不是很好），但其它的很好。频率可达２５Ｍ-DDS signal source, for the use of VHDL. DIP switch which can be used to select the appropriate function: FM, ASK, PSK, AM (This is not to achieve good), but other well. Frequen
dds_final
- 使用Verilog HDL语言实现的一个DDS，可以发生0-10Mhz正弦波、方波、三角波，频率步进可调，FM调制、AM调制，调制度可调。DA芯片为8位并行，160MHz-Using the Verilog HDL language implementation of a DDS, can occur 0-10Mhz sine, square, triangle wave, frequency step tunable, FM modulation, AM modulation, adjusta
AM
- AM信号的调制解调DSP算法，包括原理和应用-AM
AM_DE
- AM信号解调的FPGA实现。用VHDL编写，验证通过的-discribe the AM,tell you hwo to use it.
eda
- 南京理工大学EDA实验多功能数字钟+闹钟+dds+am调幅。-Nanjing University of EDA test multifunction digital clock+ alarm+ dds+ am AM.