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匹配滤波器设计，VERILOG实现的，比较好的哦-Matched filter design, VERILOG implementation, and better oh
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Vhdl实现扩频通信匹配滤波器，书上打下来的,打了好久.-VHDL realization of spread spectrum communication matched filter, books, playing down, playing for a long time.
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Increasing interest in ultra-wideband (UWB) communications has engendered the need
for a test bed for UWB systems. An FPGA-based software-defined radio provides both postfabrication
definition of the radio and ample parallel processing power. Thi
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VHDL语言实现8路并行输入，8路并行输出，直接序列扩频接收机的高速匹配滤波。
-VHDL language to achieve 8-channel parallel input, 8-channel parallel output, high-speed direct-sequence spread spectrum matched filter receiver.
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一个完整的pn码捕获与跟踪的VHDL源码,并行匹配滤波器捕获,锁相环跟踪.-A complete pn Code Acquisition and Tracking of the VHDL source code, parallel matched filter to capture, phase-locked loop tracking.
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2046点匹配滤波器，附带C/A码生成模块一个-2046 points, matched filter, with C/A code generation module 1
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设计了一种采用VHDL 语言实现的应用于扩频通信捕获的数字匹配滤波器,并对其捕获性能进行了分析,这为扩频信号处理芯片的设计提供了新的机遇.-Designed an implemented using VHDL language used in spread spectrum communication to capture the number of matched filter, and its capture performance is analyzed, which is sprea
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