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risc
- RISC_CPU 是一个复杂的数字逻辑电路,采用精简指令集,寻址空间位 8K,它的基本部件可分成八个 基本部件 -RISC_CPU is a complex digital logic circuits, using reduced instruction set, addressing space bit 8K, and its basic components can be divided into eight basic components
shuziluoji
- 这里有数字逻辑实验中的几个经典实验，有加法器的编码和一些比较好的设计-There are several digital logic experiment in classic experiments, there adder design codes and some of the better
hgfdedssxs
- 本文的电子密码锁利用数字逻辑电路，实现对门的电子控制，并且有各种附加电路保证电路能够安 工作，有极高的安全系数。 毕业设计-This locks the use of electronic digital logic circuit, electronic door control, and a variety of additional circuitry to ensure safe working circuit, has a high safety factor. Graduat
1
- 数字密码锁设计，用以74LS112双JK触发器构成的数字逻辑电路控制方案-Digital lock design for 74LS112 dual JK flip-flop circuit composed of digital logic control scheme
taxi
- 利用Verilog HDL语言设计了出租车计费器，使其具有时间 显示、计费以及模拟出租车启动、停止、复位等功能，并设置了动态扫描电路显示车费和对应时间，显示 了硬件描述语言Verilog—HDL设计数字逻辑电路的优越性。-Design using Verilog HDL language a taxi meter, it has time display, billing and simulation taxi start, stop, reset and other functions, an
VHDL-and-DLC-design
- VHDL硬件描述语言与数字逻辑电路设计 西安电子科大出版-VHDL hardware descr iption language and digital logic circuit design Xi' an Electronic Science and Technology Publishing
top
- 我自己设计的，在大学课程《数字逻辑》后面的八大实验之一的车灯实验,在quartus上设计的-that is a program about lights-controling of car
prbs-matlab
- 基于Matlab 平台根据反馈数字逻辑给出了m 序列的计算机生成源程序和m 序列的基本性质的考察代码。可根据输入的八进制 本原多项式系数生成相应的m 序列。上机结果验证了程序的正确性和有效性-Matlab-based platform based on feedback digital logic m-sequence are given computer-generated source code and the basic properties of m-sequence code vi
shuziluojidianti
- 数字逻辑课程设计 vhdl语言设计电梯系统-Digital logic design language curriculum design vhdl elevator system
digital-IC
- 本文献全面介绍了数字逻辑设计的知识与技巧，欢迎下载！-This comprehensive introduction to the literature of digital logic design knowledge and skills are welcome to download!
DE2-user-Manual-(Chinese-edition)
- DE2板教学开发板中文用户手册,DE2板的着眼于为在数字逻辑，计算机组织和FPGA 方面的学习提供一个理想的工具。-DE2 user Manual (Chinese edition)
Calculator
- JAVA版数字逻辑/电路分析专用计算器（原创）-Digital logic/circuit analysis dedicated calculator (original)
Secret-codes
- 本书用大量的篇幅讲述了与计算机原理相关的条种编码方法，并通过数字逻辑-Book with plenty of space about the principles associated with the computer coding of species, and through the digital logic
tanchishe
- 数字电路与逻辑设计综合实验，贪吃蛇游戏机的实验报告。本实验是用通过VHDL的代码编写，然后下载到EPM7128数字逻辑实验开发板上，用点阵显示老鼠，蛇，以及墙，用数码管显示倒计时以及得分的情况。最终实现老鼠的随机出现，蛇的移动以及吃老鼠得分，撞墙或触边即死。-Digital circuit and logic design experiment, experimental report of the Snake game consoles
xiawenyu-verilog-
- 数字系统设计的入门书，教你如何学会用verilog语言实现各种数字逻辑功能，例程经典易懂-xiawenyu verilog
Counter
- 用VERILOG语言实现的74*163 计数器，代码十分简单易懂，适合数字逻辑电路实验的初学者-With the VERILOG language implementation of the 74* 163 counter, the code is very simple and easy to understand, suitable for digital logic circuit experiment for beginners
DDPP
- 数字设计原理与实践，英文版,是一本数字逻辑电路方面的书籍，使用Verilog VHDL语言进行开发，并且专门有一张是来讲解如何进行开发的，一般的锁存器、寄存器之类的基础性的原理都有-Digital Design Principles and Practices
lookahead-adder
- Quartus环境下的超前进位加法器的编写代码，适合初学数字逻辑设计的学习-Lookahead adder in Quartus
Successive-binary-adder
- Quartus环境下的逐次进位加法器的编写代码，适合初学数字逻辑设计的学习-Successive binary adder in Quartus
MUX
- Quartus环境下多路选择器的编写代码，适合初学数字逻辑设计的进行学习-MUX in Quartus