资源列表
sf_2006421154739
- 关于两种实现pwm的方法 基于51单片机设计-on two methods to achieve PWM 51 microcontroller-based design
sineROM
- 自己写得一个关于sine（32X24）的程序-own written on a sine (32X24) procedures
shift_split_data
- 关于一个串行数据输入 根据时序将数据分两路输出的程序 -on a serial data input timing will be based on output data using two procedures
IMBM2000
- DEMO中完成WIAGAND26/32的（EMP7128实现）协议程序源代码-DEMO completed WIAGAND26/32 (EMP achieved) agreement procedure source code
fulladd
- 用于实现两个数相加的vhdl代码，在相应的编译器中使用-used to achieve the two summed VHDL code, the corresponding use of compiler
vhdl_example
- 一些vhdl的简单例子。直接解压，不用密码。-instantiate some simple examples. Direct unpack, without a password.
Exp6-VGA
- 通过UART从PC主机读取图片数据，并完成图片在VGA显示器上的显示-through UART from the host PC to read image data, and complete picture of the VGA display on the show
FTCTRL
- 四位十进制频率计的顶层控制模块，用于生成测频需要的复位及控制信号-four decimal frequency of top-level control modules, used to generate the required frequency measurement and control signals reset
FourBitsCounter
- 四进制计数器模块，使用VHDL语言编写，在ISE8.1中经过测试的模型-quaternary counter module, the use of VHDL language, in which ISE8.1 tested model
FullAdder
- 四位全家器的VHDL语言模块，已经在ISE8.1上经过测试通过-family of four VHDL modules, has been tested on ISE8.1 through
Exp4-Clock
- 数字计时器，使用VHDL语言编写，使用数码管显示，精确到ms-digital timer, the use of VHDL development, the use of digital control, the precision of the ms
USBXilinx
- 实现了串行通信接口的全部功能，符合RS-232-C标准的完整UART模块源代码，中文注解，清晰易懂，经过严格仿真测试，绝对好用。-a serial communication interface of all functions, with RS-232-C standard UART modules complete source code, Chinese notes, lucid, after a rigorous simulation tests, absolutely useful.