资源列表
SpecSubTD_Boll79
- 基于谱减法的语音增强在MATLAB实现源程序-speech enhancement in MATLAB source
booth
- booth乘法器电路，基四实现，附带有testbench
task
- 练习并掌握多任务实时操作系统下Task 调度、Task 间主要通信手段（信号量、消息队列等）、RISC 处理器 I/O 端口控制等内容，并形成嵌入式实时应用软件的良好编程习惯。创建多Task，为每个Task 创建私有的Message Queue，每个Task 只通过自己的私有Message Queue 接收消息；Task 间消息通信通过向对方私有MessageQueue 发送消息完成。 Task1：管理Task。负责系统启动时同步系统中其他Task 的启动同步，利用信号量的semFlush(
002222
- hd7279键盘显示芯片c51代码，希望对了解7279的朋友有所帮助-hd7279 keyboard display chip, c51 code, want to help a friend about 7279. . .
motor-control
- 采用STC12A系列单片机控制步进电机样例-step motor controlled by MCU
PSO1
- i have coding for verilogHDL and VHDL. so please i want know that coding-i have coding for verilogHDL and VHDL. so please i want know that coding..
led
- led流水灯程序，已经验证过，很有用的哦！-led water chase, has already been verified, Oh, very useful!
AC_Sample
- 变电站自动化装置12通道交流采样模块代码-Substation automation devices 12-channel AC sampling module code
ARM_37numbers_32bits
- ARM架构下的32位37个寄存器组的verilog源码-ARM architecture 32 37 register banks verilog source
LCD1602
- 液晶1602的FPGA驱动程序，可实现16x2的字符显示-1602 FPGA LCD drivers, enabling 16x2 character display
shumaguan
- 按键控制数码管，key1~16使数码管现实1——16 LED转化为2进制-Button control, digital tube key1 ~ 16 make digital tube 1-16 LED into 2 into reality
FIFO
- 用verilog语言编写的FIFO文件，这是一种传统的按序执行方法，先进入的指令先完成并引退，跟着才执行第二条指令，希望能够帮助读者-With verilog language FIFO file, which is a traditional sequential execution method, first enter the command to finish and retire, followed by only the second instruction execution, h