资源列表
FPGA_compile_error
- 很好的FPGA学习资料，从入门到深入，欢迎大家下载。-FPGA compile errors
FFT-TMS320C54x-DSP
- FFT的TMS320C54x DSP实现（ccs3.3编译器）,fft.c为主要程序，在程序注释所提示处设断点，再用CCS的图形查看功能可看结果。-The FFT TMS320C54x DSP to achieve (ccs3.3 compiler,), fft.c for the main program at the breakpoint in the program comments prompted then CCS graphical view function to see the
扩频通信的Verilog工程
- 扩频通信的Verilog工程，对从事无线通信的工程人员有参考作用。(Spread spectrum communication Verilog project, engaged in wireless communications engineering staff reference.)
GPSInfo
- project to use camera in windows mobile sdk 6,0
EXTENSION
- The amplitude and phase angle of the converter ac output voltage can be controlled simultaneously to achieve rapid and independent control of active and reactive power in all four quadrants. The control of active and reactive power is bidirectional a
9-定时器0动态显示数码管
- 在8M晶振下,实现四位数码管利用定时器0定时动态显示(Under the 8M crystal oscillator four bit digital tube is implemented)
步进电机调速系统
- 通过按键以及数码管显示，实现步进电机的调速正反转等操作(Through button and digital display, stepper motor speed adjustment and reverse operation.)
锁相环频率合成
- 基于51单片机的锁相环频率合成器的设计。使用PLL集成芯片CD4046，可编程分频芯片CD4522（同MC14522），使用LCD1602显示，频率由按键输入。标准输入信号为1khz方波。(Design of PLL Frequency Synthesizer Based on 51 single chip microcomputer. Using PLL integrated chip CD4046, programmable frequency division chip CD4522 (M
ERESE
- DSP642擦写Flash代码。用于DSP642代码下载等相关(DSP642 erased the Flash code. For DSP642 code download and other related)
毫秒定时器
- 在Isis中基于51单片机的仿真，实现毫秒定时功能(In Isis, based on the simulation of 51 MCU, the millisecond timing function is realized.)
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- 四路红外循迹小车，曾成功挑战多个复杂线路，稳定百分百不会跑出跑道且速度快，编程思路可供本科生参加电子竞赛参考。(The four-way infrared tracking car has successfully challenged many complicated lines. It is 100% stable and will not run out of the runway and has a fast speed. The programming ideas can be use
计数器
- 实现计数功能，可应用于单片机，里面包含keil程序。(It has a counting function)