资源列表
user_yjctrl
- sed1335写数据接口程序实现。找RA8835更换，网上都说不用改软硬件，可是我的实现不了。-sed1335 write data interface processes. Find RA8835 replacement, said online software not changed, but I do not materialize.
fdmk
- 键盘防抖模块Verilog硬件描述语言代码-Anti-Shake module keyboard Verilog hardware descr iption language code
Trafficlight
- 数字电路设计试验中用Verilog语言实现的 交通灯源码-Digital circuit design using Verilog language test traffic light source
play-piano
- 用C语言实现的弹钢琴源码,用你的keyboard实现钢琴梦想，很强大:)-Implemented in C language source code to play the piano, piano with your keyboard to achieve a dream, very powerful:)
tan
- LCD液晶屏驱动控制，基于51单片机，可以测试。调试成功-LCD panel drive control
SRAM
- 有关sram的控制器源代码 有需要的可以免费下载-Sram controller about the source code need free download
postal-codes
- postal codes of various cities
timer_counter
- ZLGLPC1700 Cortex—M3 开发板 定时器 计数器-ZLGLPC1700 Cortex—M3 Development board Timer_counter
kk
- 64x16点阵,可显示4个字,sns的份上lag卡纳sdk林凤娇思考鼎龙股份-64x16 dot matrix display 4 word sns the sake lag Qana sdk Lin Feng-thinking Ding Long shares
divider_32bitdivby16bit
- verilog代码实现的32位除以16位无符号整数除法器，在别人8位除法器的基础上改进完成，32个时钟周期完成一次运算。-verilog code for 32-bit divided by 16-bit unsigned integer divider it s based on other guy s 8 bit divider verilog code. it need 32 clock cycles to complete an operation.
mdio_mdc
- mdio verilog 实现-mdio verilog coding
f28xpwm
- DSP 电机控制PWM发波部分, 根据电流调整PWM占空比-DSP motor control