资源列表
51--i2c
- 51 i2c 51 i2c 51 i2c-51 i2c 51 i2c 51 i2c 51 i2c5 i2c a i2c51
display
- vhdl实现的显示模块的源代码，是电子竞赛的必备源码-VHDL realization of the display module s source code, is an essential source of electronic competition
shifter
- 完成一个加速器设计，全加器，具 8位计数器-Complete a accelerator design, full adder, an 8-bit counter
sufangchulidaina
- 可以打开一个对话框选择1个或多个文件进行浏览。浏览器中有用于放大、缩小图片的按钮-Can open a dialog box to choose one or more files to browse. Browser are used to enlarge and narrow picture of the button
CreateCollage
- This function imports images from a directory and then creates a collage of those images to form a new image by matching pixel colours.
ywjc
- 采用状态机的方法实现移位寄存器，用Verilog HDL编写，已经通过验证。-The method uses the state machine implementation shift register, with write Verilog HDL has been verified.
adc
- 掌握S3C2410A的模/数(A/D)转换器的应用设置，进行电压信号的测量.使用AIN0和AIN1测量两路直流电压，并将测量结果通过UART0向PC机发送.-NC divider based on VHDL language, the designer can modify the frequency coefficient code
fsm_moore_1_always
- 使用1个always块描述Moore FSM（摩尔状态机）-Moore FSM 1 always
fpga_com_intf
- 一个简单的串口通信程序，verilog, 很容易实现，而且占资源很少-a simple serial interface
atel2_bin
- 串行口 VHDL 嵌入式 单片机 串行接口实现-serial port
Lab2RGB
- Lab2RGB takes L, a, and b double matrices, or an M x N x 3 double image, and returns an image in the RGB color space. Values for L are in the range [0,100] while a* and b* are roughly in the range [-110,110]. If 3 outputs are specified, the
c5c
- 实现5人表决的功能，并有倒计时跟指示功能。-Implement 5 people vote, and the timing and voting results show.