资源列表
jpg_function
- // RGB -> YCbCr // Y = Coef. for red*Red+Coef. for green*Green+Coef. for blue*Blue // Cb = (Blue-Y)/(2-2*Coef. for blue) // Cr = (Red-Y)/(2-2*Coef. for red) // YCbCr -> RGB // Red = Cr*(2-2*Coef. for red)+Y // Green = (Y-Coef. for b
manualhist
- manual histogram equlization where u manpulate the desired histogram of image to get the one p then applying g=histeq(f,p)
AdControl
- AD7470_7472 采样的verilog 代码，通过硬件调试直接可用的，程序里 定义了100个8位存储器，用于接收采样的数据，当100个数据接收完毕时不在接收 ，并一直开始循环输出 所采数据。用时 修改下就行-FPGA code for analogue and digital conversion,which has been tested with hardware.
FSMwithOutputsDecode
- 有限状态机FSM with Outputs Decoded in Parallel Output Register-FSM with Outputs Decoded in Parallel Output Register
ds18b20
- program to enable reading temperature from a ds18b20 temperature sensor
FP-AND-DIPLAY
- VHDL分频程序：将输入为MHz数量级的频率进行分频，得到自己所需的Hz数量级频率。 七段数码管显示程序：将输出进行译码，通过数码管显示。-VHDL divider, divide the input MHz frequency of the order of magnitude, to get the required Hz magnitude frequency. Segment digital tube display program: the output of decoding
qpsk
- QKSK 调制 解调 调试成功 -QKSK modem debugging success
16-bit-A-DCa16-bit-DAC-VHDL
- 16-bit Analogue to Digital Converter&16-bit Digital to Analogue Converter VHDL source code.在modelsim下仿真通过-16-bit Analogue to Digital Converter & 16-bit Digital to Analogue Converter VHDL source code. Simulated in modelsim
youxianpaidui
- CPLD/FPGA开发常用程序，用CPLD实现可编程逻辑电路，优先排队电路编程实现-CPLD/FPGA development of common procedures, with CPLD programmable logic circuit, priority queuing circuit programming
4x4keypad-avr
- 4x4 keypad C library for AVR MCU, compiled on CodeVision AVR.
images_to_avi
- 将图像变成视频,采用opencv编程 将图像变成视频,采用opencv编程-convert image to avi
zifu
- 字符生成，包括3种字符生成的算法，在VC下只要添加特定的头文件即可运行-Character generation algorithm