资源列表
BackGroundDifference
- 這個副程式，可以直接加在bcb的程式內，直接就能將抓取的兩張影像做相減後的結果，然後將它顯示在image上-the subroutines that can be directly added to the bcb program, Grasp will be able to direct the two images is done by the results, which will be shown in the image on
fet140_2
- MSP-FET430P140 Demo - Software Toggle P1.0-MSP-FET430P140 Demo-Toggle P1.0 Software
histogram_equalization
- A useful function for histogram equalization.
PS2
- 设计一个计数器，信号频率为10MHZ，没10M个信号记一次数。-counter
1addto10
- 本程序是一个从1累加到10的小算法，用VHDL编写与实现-no
spi25
- 铁电SPI 读写 FPG *SPI铁电存储器的读写控制代码.-FM25** SPI R/W
AD9957_Signal_Generate
- AD9957芯片通过FPGA配置的verilog程序,要自建工程，代码测试完全可用-AD9957 chip FPGA configuration verilog program, to be self-built project, code test is completely available
code
- 可以打出一个菱形 是自己编写的第一个真正地程序。来自韩顺平java学习第四课的作业-my first java cod
rxtx
- 串行通信程序，程序稳定可靠，分为好多模块代码写的不错，值得参考，-Serial communication program, the program is reliable, divided into a lot of module code written well worth considering.
phase_add
- 分频器，实现任意频率的分频，只需修改频率控制字,已经经过多次验证-Divider to achieve any frequency divider, simply modify the frequency control word, has been repeatedly verified
C702
- 控制HMC702的VHDL程序代码,实际使用是可以的，HMC MODE-HMC702 SPI VHDL code
Dijkstra
- 用verilog 实现求最短路的Dijkstra算法，用modelsim仿真通过，数据真确，-Dijkstra implemention with verilog base on FPGA