资源列表
微处理机接口电路设计
- 微处理机接口电路设计，用verilog写-microprocessor interface circuit design, writing Verilog
16-bit数的偶数奇偶校验
- 16-bit数的偶数奇偶校验及阶乘运算，用verilog写-16-bit number of even parity and factorial computation, written using Verilog
DOSTaoJie
- 一个原始套接字的实例-an example of the original socket
存储器模型及测试台
- 512x8存储器模型,及其测试台，用verilog写-512x8 memory model, and the tester, using Verilog write
ProxyLink
- C源代码-客户端怎样通过proxy进行连接,支持https,socks5代理。-C source code-client how to connect through proxy support https, togig agent.
latch
- 门拴电路,4位选择器，alu,用verilog写的。-doors Shuan circuit, four selectors, ALU, with Verilog writes.
start
- 在伟福环境下修改 Startup.a51 init.a51 以改变系统初始化过程-in Wai Fu environment changes Startup.a51 init.a51 to change the system initialization process
stairs
- 一个用数组的方法解决大数、巨数的阶乘结果越界问题的算法.-an array of methods used to solve large numbers, the huge number of cross-border issues results factorial algorithm.
在伟福环境下实现PLM51调用PLM51范例
- 在伟福环境下实现PLM51调用PLM51范例-in Wai Fu environment under PLM51 paradigm called PLM51
在伟福环境下实现PLM51调用ASM51范例
- 在伟福环境下实现PLM51调用ASM51范例-in Wai Fu environment under PLM51 call Calling example
在伟福环境下实现C51调用PLM51范例
- 在伟福环境下实现C51调用PLM51范例-in Wai Fu environment under C51 model called PLM51
伟福环境下反汇编demo1
- 伟福环境下反汇编demo1