资源列表
model
- 用vhdl写的 ddr sdram 控制器,数据位可以修改。在quartus2下仿真通过-With written ddr sdram controller vhdl
filter
- 用vhdl硬件描述语言写的中值滤波器，主要对尖峰脉冲进行消除。在fpga上实现。-Vhdl hardware descr iption language used to write the median filter, mainly to eliminate spikes. Implemented on the fpga.
MOTOR
- DS18B20温度测试 同时数码管动态扫描显示 提供源码 附件当中包括proteus仿真文件 下载后可直接仿真。-DS18B20 temperature tests the same time dynamic scanning display provides digital accessories including proteus simulation source file can be downloaded direct simulation.
2052pwm
- stc单片机PWM演示程序、根据典型应用转译-stc microcontroller PWM demonstration program, according to the typical application translation
1602display
- 1602液晶显示模块程序、c语言编写、适用于51单片机-1602 LCD Module program, c language, for 51 single
DS1302
- ds1302时钟源程序、C51适用、C语言编写、适合初学者-ds1302 clock source, C51 application, C language, suitable for beginners
ir-remote
- 单片机红外摇控解码源程序、适用初学者、C语言编写 -Infrared remote control decoder chip source for beginners, C language
kongzhitai
- 编译环境KEIL4.在12864写的小车操作平台，已把NRF、12864、4X4键盘驱动写成函数 工程名jjjaaa -Build Environment KEIL4--- 12864 write in the car platform, has NRF, 12864,4 X4 keyboard driver works written in the function name jjjaaa
timer-use
- 典型定时器应用源程序、C语言编写、适合初学者-Typical timer application source, C language, suitable for beginners
verilog_Common_arithmetic
- 常用逻辑运算，加法器，乘法器及除法器的verilog语言，可用modelsim或Quartus II 9.0环境-Common logic operation, adder, multiplier and divider verilog language, can be used modelsim or Quartus II 9.0 environment
HUMIDITY-aTEMPERATURE-METER
- STC做的温湿度计.555定时器做的计数脉冲方法读取频率值。-STC do hygrometer .555 timer to do the counting method of reading the pulse frequency.
Integrator-comb_timing-state
- 积分梳状滤波器和时序状态机的Verilog语言描述，适合硬件描述初学者-Integrator-comb filter and timing the Verilog language to describe state machines, hardware descr iption suitable for beginners