资源列表
E4_1_fir1
- 基于ip核的fir滤波器设计，调用了ip核，并实例化，对初学者很有用。-Based on the ip kernel fir filter design, call the ip kernel, and instantiation, very useful for beginners.
proteus-1602
- 基于proteus仿真的频率计,用LCD1602显示频率，硬件实验通过，将别人的仿真图和普中的程序结合在一起。-Based on the proteometer simulation of the frequency meter, with LCD1602 display frequency, the hardware through the experiment, the simulation of others and Pu in the program together.
led-int-t0
- 单片机入门程序，LED闪烁。利用定时器0的自动重装入，精确控制LED明灭时间。-Single-chip entry program, LED flashing. Accurate control of LED off time with automatic reload of timer 0.
LED-Proteus
- 单片机&proteus 仿真, LED 闪烁，用 C51编程.-SCM and proteus entry, LED flashing lights. Programming with C51.
C
- 用stm32单片机使用C语言写的一个简单的五线四相的步进电机控制程序-A stepping motor using C language used to write a simple microcontroller stm32 five-wire four-phase control program
uvm-1.1
- 学习IC验证的好资料，包括UVM-1.1a和UVM-1.1d的全部工程example,适合IC验证基于UVM平台的初学者。-Learn good about IC verification, including all engineering of UVM-1.1a and UVM-1.1d, for beginners based on the UVM platform for IC verification.
LCD1602head
- 液晶屏LCD1602，的头文件。根据1602时序，用C51编程。-LCD screen LCD1602, the header file.
ENC424J600
- 基于M0516的 ENC424J600的驱动程序-Based on the driver' s M0516 is ENC424J600
digital_clock
- 基于vivado的FPGA数字闹钟的程序，verilog语言编写-Vivado based on the FPGA digital alarm clock procedures, verilog language
project_fir_test
- 基于verilog的FIR滤波器设计，使用BASYS３作为开发工具-Verilog based FIR filter design, the use of BASYS3 as a development tool
fft_ex1
- 基于verilog的FFT设计，使用vivado作为开发平台-Verilog based on the FFT design, the use of vivado as a development platform
Two-wheel-balance-car
- 两轮平衡小车,STM32,硬件调试OK，很有参考价值，要的就下啦。-Two-wheel balance car, STM32, hardware debugging OK, very reference value, to the next friends