资源列表
vmwarebsp
- vmware的bsp，vxworks6.6先实现-vmware bsp under vxworks 6.6
my_emac
- modelsim仿真网口MAC收发数据包的实现代码-Modelsim simulation port MAC transceiver packet implementation code
mac
- 基于网口的收发数据及解析数据内容的verilog代码实现-Based on the Internet port to send and receive data and parse the contents of the data verilog code
motor
- 步进电机驱动,实现加速减速以及周期加减速。-motor driver
tianjialianbiao
- 在栈中以结构体形式存入，同时扫描每次存入的数据-In the stack in the form of the structure of the deposit, while scanning the data stored each time
bch_dec_enc_dcd
- 关于BCH的编码器和译码器，可实现16位，32位，64位，128位的编码和译码纠错，2位纠错，Verilog实现-On the BCH encoder and decoder, can achieve 16-bit, 32-bit, 64-bit, 128-bit encoding and decoding error correction, 2-bit error correction, Verilog implementation
stm32f103---Entrance-guard-card
- stm32门禁卡工程，外接硬件后可直接下载到stm32板子上，刷卡识别通过-STM32 access card project, the external hardware can be downloaded directly to the STM32 board, credit card identification through
qiupingjun
- 求两个任意输入整数、浮点数值等等的平均值。-Find the average value of two arbitrary input integers, floating point values, and so on
source
- 2. /qdr2/source/qdr2_io.v > Top level file includes declarations of HSTL1 and LVTTL I/O standards /qdr2/source/qdr2.v > Main module of the QDR memory controller /qdr2/source/pipeline.v > Pipeline module for increasing performance
USB_HOST
- STM32F401系列的USB_CDC_HOSt的例程-STM32F401 USB_CDC_HOST example program
AD
- ad采集和串口输出，实现数据的传输和AD转换-It is useful
OLED
- 控制显示屏显示，包括汉字，字符串等的显示-this can controll OLED12864 display、