资源列表
uart_ip
- 实现串口通信模块设置,包括频率分频、波特率产生、接口时序要求(Implementation of serial communication module settings, including frequency division, baud rate generation, interface timing requirements)
cmos_i2c_ov7670
- 完成OV7670摄像头的一个I2C协议配置,从机主机的时序读取编写功能(Complete the OV7670 camera an I2C protocol configuration, slave host timing read write function)
sdram_ip
- 完成SDRAM的上电配置,状态机编写其读写模块,存储模块,并通过两个异步作为存储和读取的通道(Complete the SDRAM power-on configuration, the state machine to write its read-write module, memory module, and through two asynchronous as a storage and read the channel)
PWM
- 利用stm32实现以PWM波原理控制舵机多角度、多速度转动,(The PWM wave control motor is controlled by stm32.)
Open18F4520-Demo
- 开发板例程,PIC18F系列单片机,很实用,可用(Development board routines)
fen
- 分频器,可以实现时钟分频,频率变小则周期变长(Frequency divider, can realize clock frequency division, frequency becomes smaller, then the cycle becomes longer)
AD9832
- AD9832频率计的VHDL驱动,可以调整频率及相位(VHDL driver for AD9832 frequency meter)
ENC28J60
- 51单片机联网功能一步一步教你移植uIP0.9到8051+ENC28J60(51 MCU networking function)
新建文件夹
- 对于八路抢答器的具体程序的 个人见解 仅仅是个人对八路抢答器 的程序了解 望采纳(visual For the eight line responder specific procedures of personal opinion is only personal understanding of the eight responder program, hope to adopt)
1
- 43ht45gy54wggggggggtrh6j7i8k5jhew(354gt6h5uj477jh5theg65uj7ik84j)
IIR滤波器的FPGA设计
- 基于verilog hdl语言对IIR滤波器设计(Design of IIR filter based on Verilog HDL language)
实验2 蜂鸣器实验
- 单片机开发,热心队友恳请加入大家新家庭(SCM development, enthusiastic teammates, please join our new family)
