资源列表
M64-PS2
- 基于PS2键盘程序设计 功 能：PS@键盘 时钟频率：无要求 设 计：改自微雪 修改日期：2007年08月01日 编译环境：ICC-AVR6.31 实验环境：M64学习板 使用端口：SCK:PD3 SDK:PD4-PS2 keyboard-based program design features: PS @ keyboard clock frequency: No request Design: adapted from Wei
DE2_NIOS_HOST_MOUSE_VGA
- 在DE2开发板上实现的VGA输出游戏。硬件用Verilog语言编写，在Quartus上编译；软件用C语言编写，在Nios2上编译运行。把DE2板和显示器键盘连起来即可使用。-Development in the DE2 board game to achieve the VGA output. Hardware using Verilog language, compiled in the Quartus software with C language, compiled to run in
DE2_NET
- 用DE2开发板实现的网络控制器。硬件用Verilog语言编写，在Quartus上编译；软件用C语言编写，在Nios2上编译运行。程序已经过测试，功能完好。-DE2 development board with the realization of the network controller. Hardware using Verilog language, compiled in the Quartus software with C language, compiled to run in
pwm_test
- M8 3相SPWM测试程序，硬件产生三相PWM方法，PB1,PB2,PB3脚设置为输出 。-M8 3-phase SPWM test procedures and hardware have a three-phase PWM method, PB1, PB2, PB3 pin set to output.
FFT
- 对信号进行采样，信号范围20hz-10khz,采样频率20480hz,采样点数1024点，分辨率20hz,用c8051f020内部12位ad进行转换，对转换的数据做fft，可以求出总功率和功率谱-Sampling of the signal, the signal range of 20hz-10khz, sample rate 20480hz, sampling 1024 points, the resolution of 20hz, with 12 ad internal c8051f020
LCD
- 用c8051f020控制RT12864显示数据-RT12864 with display data c8051f020 control. . . . . . . . . . . .
clock10
- 篮球24秒计数器。用Verilog语言编写，在maxplus2中编译运行。适用于大部分FPGA开发板，但必须更改引脚分配。-24 seconds counter basketball. Verilog language used in compiling maxplus2 run. Applicable to most FPGA development board, but must change the pin assignment.
can
- C8051F040 CAN-bus test Code
F04x_SPI0_Master
- C8051F040 SPI Test Code (master unit)-C8051F040 SPI Test Code (master)
F04x_SPI0_Slave
- C8051F040 SPI Test Code (Slave)
xapp460
- xilinx hdmi tx rx verilog code
game
- 89C51与液晶12K64实现贪食蛇游戏，4X4键盘控制-89C51 and LCD贪食蛇achieve 12K64 game, 4X4 keypad control