资源列表
RegGroup
- 这是32位的寄存器组，是用verilog编写的，包括源地址及目的地址的选择-This is a 32-bit register group, is prepared verilog, including the source address and destination address selection
uCOS_S3C44B0_code_1.0
- uc/OS在S344B0上的移植代码,就不多说了,一份很好的学习和研究资料.-uc/OS in the transplant S344B0 code, not more than that, a good learning experience and research data.
paomadeng
- 实现C51单片机跑马灯程序，已经编译调试成功-Marquee C51 single-chip process to achieve
homework32
- 这是32位移位寄存器，是用verilog编写的，能够实现从1到31位的左或右的移位-This is a 32-bit shift register, is prepared verilog, can be realized from the 1-31 shift left or right
EasySystem_2
- 基于优龙公司的YL2410建立的ads工程，包括一个自行实现的GUI，一个小型的文件系统，可引导linux，wince双系统的bootloader,对GUI开发，bootloader移植等都有较好价值。-Based on the excellent Dragon' s ads created YL2410 works, including a self-realization of the GUI, a small file system, can guide linux, wince d
huffman
- MP3播放器中的基于霍夫曼（huffman）解码的vhdl语言描述-MP3 player based on the Hoffmann (huffman) decoding descr iption language vhdl
4x4Keyboard_Source
- 4x4键盘应用、测试,完整的应用、测试模块，用于ARM处理器-4x4 keyboard used by embeded MCU Application and test
ADS1.2Chinese_Tor
- 32位 ARM嵌入式处理器的调试技术。叙述了有关于JTAG的技术-32-bit ARM embedded processor debug technology. Described on JTAG technology
GL819_SCH_123
- GENESYS GL819多合一读卡器电路图-good study
max191_mcu
- 显示由mcu控制max191采集到的电压(四位有效数字)-Show by max191 collected mcu control voltage (four digits)
UART(FPGA)
- 基于现场可编程逻辑器件（FPGA）使用VHDL语言QuartusII实现UART通讯-Based on field programmable logic device (FPGA) using VHDL language QuartusII achieve UART communications
sram_lcd_ok
- 图形模式:取模方式为64*128,所画即所得 取模软件设为逐行顺向扫描-Graphics mode: access mode for the 64* 128, the painting modulus that is derived from software set to progressive scan forward