资源列表
DUC.rar
- 基于XILINX ISE下的数字上变频设计，其中用到了XILINX的乘法IP。已经通过工程实用，好用。,XILINX ISE based on frequency of figure design, use one of the XILINX multiplication IP. Has passed the project practical, easy to use.
ml506_lab_resources.zip
- xilinx 开发板ML506 示例代码集合。,Xilinx ML506 development board sample code collection.
fifo
- 异步fifo，用Verilog编写，包含testbench，已经通过modelsim调试，内含文档和波形图-Asynchronous fifo, to prepare to use Verilog, including testbench, debug modelsim has passed, including documents and wave
用LV获取机器CPU和硬盘序列号
- 用LV获取机器CPU和硬盘序列号，labview 8.6版本可以使用-Access to the machine with the LV CPU and hard drive serial number, labview 8.6 version can be used
costas的verilog程序
- costas的verilog程序，包含乘法器，DDS，鉴相器，环路滤波器等模块-costas the verilog program, including multipliers, DDS, phase detector, loop filter modules
aes
- verilog实现的AES-128加解密程序，FPGA验证通过-verilog implementation of AES-128 encryption and decryption process, FPGA verification through
Verilog-pci
- PCI的FPGA实现，使用verilog硬件描述语言模拟pci数据接口的数据传输过程。-PCI simulation with FPGA, using the verilog hardware describing language to simulate data transfer processes on pci data interface.
syn_frame
- 基于verilog的帧同步搜索,fpga中可以实现帧头搜索，进而实现同步，并有一定的容错能力-verilog-based frame synchronization searching
FFT_verilog
- verilog实现的FFT变换，经硬件测试其功能与Altera的FFT IP核相近-verilog implementation FFT transform, through hardware, test its functionality with Altera' s FFT IP core similar to
LDPC-Verilog
- LDPC的verilog程序，含有编解码的过程-LDPC verilog
SDR
- 直接序列扩频通信的Verilog仿真代码，在Quartus II中实现。-Direct sequence spread spectrum communication Verilog simulation code, implemented in Quartus II.
GPS.RAR
- 本工程包含了一个GPS接收机的基带处理模块，包括信号捕获和跟踪、电文解调等-The project includes a GPS receiver baseband processing modules, including signal acquisition and tracking, message demodulation