资源列表
DIFF
- DIFF是比较两个数中相同的数字，然后输出一个相同的个数为5bit，输出vld标志。包含程序及说明-DIFF comparing two numbers is the same number, and an identical number of outputs 5bit, output vld flag. Contains the procedures and instructions
flow_proc
- 流水线结构是在逻辑很复杂的情况下使用，通过分栈，把一个复杂的逻辑分成若干个比较简单的块实现，减少信号的逻辑级，提高频率。最形象的实例就是位宽较大的加法器。此程序就是verilog的实现 -In the pipeline structure is complex logic case, through the sub-stack, the complex logic into a plurality of blocks of a relatively simple implementation
zhl
- 设计一个跑马灯控制器，能够根据外部的拨码开关进行速度控制。在速度控制的基础上，根据外部开关变换跑马灯显示方式。-Design a Marquee controller speed can be controlled according to the external DIP switches. On the basis of the speed control, according to the display mode change Marquee external switch.
32bit_add
- 32位进位选择加法器 用四位先行进位加法器扩展成32位二进制加法器-32 carry select adder Used four carry-lookahead adder extended to 32-bit binary adder
SRC
- 设计一个32位MIPS多周期微处理器 算数指令：ADD/ADDU/SUB/SUBU/ADDI/ADDIU 逻辑指令 移位指令 条件分支指令 无条件分支指令 数据传送指令-Design a 32-bit MIPS microprocessor multi-cycle arithmetic instructions: ADD/ADDU/SUB/SUBU/ADDI/ADDIU logic instructions shift instruction conditional br
lpc_ctrl
- LPC协议功能实现模块，能够完成读，写等操作-lpc control module
vhdl-examples
- vhdl实例，包括vhdl的基本语法，还有众多触发器、状态机和一个小游戏的实现，是学习vhdl的绝好资料！-vhdl examples, including basic grammar vhdl, there are many triggers, the state machine and a small game to achieve, is to learn vhdl excellent information!
LS138_Decoder
- 例子是一个用VHDL硬件描述语言设计的一个38译码器的代码，FPGA芯片是Aalert EPC4.-Example is a VHDL hardware descr iption language a 38 decoder design code, FPGA chip is Aalert EPC4.
example_vga_1
- 这个代码时用全志FPGA开发板写的，语音用的是veiloge,功能是用FPGA实现VGA接口硬件连接的实验，FPGA芯片为ALTER EPC4-When this code is used to write full blog FPGA development board, the voice used is veiloge, function experiments using FPGA VGA interface hardware connections, FPGA chip ALTER E
FIFO.v
- 异步先进先出FIFO存储器，采用格雷码判定，消耗资源更小-Asynchronous FIFO FIFO memory, using Gray code determination, consume less resources
vga-timing-generator
- VGA时序产生，可用于VGA接口的时序控制-VGA Timing Generator
COMPLETE-UART_16
- the project is complete a UART implementation where 16 UART are connect with top module for aerial applications-the project is complete a UART implementation where 16 UART are connect with top module for aerial applications