资源列表
jtd
- 交通控制灯的设计源码和仿真波形，和逻辑单元结构图-The design of traffic control light source and simulation waveforms, and the structure of logic cells
75448197verilog
- 一些很实用的verilog源程序，是初学者的好棒手，希望能给需要的人一点帮助-Verilog some very useful source is the beginner' s好棒hand, hope that they will need a little help
5_lined_cpu
- 简单5级流水线CPU的verilog逻辑设计-Simple line 5 of the CPU logic design verilog
74LV245
- VHDL语言是面向硬件的语言，非常重要的文件-VHDL language is the language of the hardware-oriented
vhdl
- full adder is implemented using VHDL
mux
- Mulriplexer is implemented using VHDL.
jkff
- JK flip-flop is implemented using VHDL
srff
- SR flip flop is implemented using VHDL
shujujiegou
- 数自逻辑实验报告有关于83译码器的编写，用VHDL编写程序-Since the logic of the report of the number of experiments on the preparation of 83 decoder using VHDL programming
4multiplier
- 4位乘法器vhdl程序-- DEscr iptION : Signed mulitplier:-- A (A) input width : 4-- B (B) input width : 4-- Q (data_out) output width : 7-4 multiplier vhdl procedure