资源列表
readmemb
- 在Verilog使用readmemb()函數範例-In Verilog use readmemb () function example
deb_dump_memory
- Verilog與debussy使用memeory的範例-Debussy using Verilog and the example of memeory
glitch_gen
- Verilog產生glitch generator的範例-Verilog examples generated glitch generator
suoxianghuan
- 这是一款计算锁相环参数的软件，附有源程序-This is a phase-locked loop parameters for the calculation software, with source code
state
- 米勒解码器的状态转换模块。用verilog语言编写，ISE为开发环境-Miller decoder module of the state transition
mips1
- Verilog MIPS design. I found it somewhere on Internet and it is working :-Verilog MIPS design. I found it somewhere on Internet and it is working :))))
61EDA_D964
- 4_4小键盘扫描+VHDL语言的，可以实现数码管显示，有译码功能-Scan 4_4 small keyboard+ VHDL language can be achieved digital display, a decoding function
johnson
- JOHNSON计数器，8bit,在FPGA板子上简单的实现，给大家作为练习-JOHNSON counter
ISP1362
- source code for ISP 1362
cw
- 用ip核设计的信号发生程序，altera的 用ip核设计的信号发生程序，altera的 用ip核设计的信号发生程序，altera的 用ip核设计的信号发生程序，altera的-signal source for altera by ip coresignal source for altera by ip coresignal source for altera by ip coresignal source for altera by ip coresignal source for alte
LAB7
- Verilog code to move a servo.
lab8_wena_Arturo
- vga verilog code for showing the vga pattern and diferent functions for a Spartan develp card