资源列表
seqdet2
- 状态机实现序列检测VerilogHDL及其仿真-State machine implementation sequence VerilogHDL Detect and Simulation
Xilinx_Basys
- xilinx公司出的FPGA开发板和原理图-The FPGA company Xilinx development board and the schematic diagram
PLD_SRAM
- PLD自增读写SRAM,有好的参照作用，希望大家指点和帮助。-PLD by reading and writing since the SRAM, has reference to the role of good, I hope everyone pointing and help.
t1
- 带清零和重置功能的十进制计数器，可以用LED灯显示结果-Cleared and reset with the decimal counter, can use LED lights display the results
ls138
- 用原理图的方式编程实现74ls138模块功能，已经通过编译-Schematic way by programming 74ls138 module implementation has passed the compiler
adder
- 用VHDL语言实现半加器。已经通过编译和仿真-Implementation using VHDL language half adder. Has passed the compiler and simulation
i2c.tar
- 是个I2C软核，使用verilog和vhdl实现的，含有testbench。-this is soft core of I2C in verilog rtl and VHDL.
200632610274783742
- 常用VHDL程序，包括27个程序，详情见附件 ，详情见附件-VHDL common procedures, including 27 procedures, as detailed in attachment, as detailed in attachment, as detailed in annex
jiaotongdeng
- 交通灯控制系统VHDL源码，用VHDL语言、MAXPLUS2环境设计实现-VHDL core
jisuanqi
- 用VHDL语言实现通用计算器设计，MUXPLUS2软件仿真验证-Implementation using VHDL language design generic calculator, MUXPLUS2 software simulation to verify
pinlvji
- 频率计程序设计与仿真验证，基于VHDL语言-Cymometer process design and simulation verification, based on the VHDL language