资源列表
EP1C3_12_9_DDS
- 直接数字式频率合成器(DDS)设计实验(电子设计竞赛赛题) 其它详细资料说明请参考 http://www.kx-soc.com-direct digital frequency synthesis (DDS) experimental design (Electronic Design Contest tournament title) said other details Please refer to prescribed http://www.kx-soc.com
baseball
- 用VHDL开发的棒球游戏，可以在QuartusII环境下编译，适用于各种FPGA开发板。-VHDL development of the baseball game, in QuartusII environment compiler, apply to all FPGA development board.
VerilogHDLSourceCode
- Verilog_HDL源码， Verilog_HDL源码-Verilog_HDL source, Verilog_HDL FO
CorePWM_RTL_Verilog
- Verilog_HDL源码 -Verilog_HDL source Verilog_HD L FOSS Verilog_HDL FO
FIFO
- 一个可以综合的Verilog 写的FIFO存储器 内附文档说明-a comprehensive Verilog can write FIFO memory attached document shows
cordic
- cordic算法的vhdl实现，内附有文档说明-cordic algorithm vhdl realized, a document containing a note
RISCMCU
- riscMCU的VHDL实现，内附有modelsim仿真testbench和文档说明-riscMCU VHDL, modelsim containing a simulation testbench and documentation shows
mc8051design
- VHDL写的8051内核,可用的,好用,有兴趣可下载,在外国网站下载的-write VHDL 8051 kernel, available, convenient, can be downloaded interested in the foreign website
frequency
- 显示频率测量，外接24MHz晶振，显示数据为三位，分四个档来测量-show frequency measurement, external 24MHz crystal oscillator, the data show that three, four hours to measure stalls
i2c
- I2C端口的FPGA实现，网上较多，但发现不少有问题，这个是在网上代码的基础上修改过，验证可行。-I2C port FPGA, online more, but found that many problems This is a code on the Internet on the basis of the revised test feasible.
LEDDisp
- 8位7段LED显示源码，扫描显示，稳定高效-seven of the eight LED source, scanning, stable and efficient
Eda1
- 程序在报告中，要 用QuartusII运行，注意从word到运行环境中，可能有个别符号不兼容，重新在运行环境中输入那些符号就可以了-procedures in the report, with QuartusII operations, the attention to word from the operating environment, Some individual symbols are not compatible, the operating environment to re-e